Charge transport layers (CTLs) are key components of diffusion controlled perovskite solar cells, however, they can induce additional non-radiative recombination pathways which limit the open circuit voltage (V-OC) of the cell. In order to realize the full thermodynamic potential of the perovskite absorber, both the electron and hole transport layer (ETL/HTL) need to be as selective as possible. By measuring the photoluminescence yield of perovskite/CTL heterojunctions, we quantify the non-radiative interfacial recombination currents in pin- and nip-type cells including high efficiency devices (21.4%). Our study comprises a wide range of commonly used CTLs, including various hole-transporting polymers, spiro-OMeTAD, metal oxides and fullerenes. We find that all studied CTLs limit the V-OC by inducing an additional non-radiative recombination current that is in most cases substantially larger than the loss in the neat perovskite and that the least-selective interface sets the upper limit for the V-OC of the device. Importantly, the V-OC equals the internal quasi-Fermi level splitting (QFLS) in the absorber layer only in high efficiency cells, while in poor performing devices, the V-OC is substantially lower than the QFLS. Using ultraviolet photoelectron spectroscopy and differential charging capacitance experiments we show that this is due to an energy level mis-alignment at the p-interface. The findings are corroborated by rigorous device simulations which outline important considerations to maximize the V-OC. This work highlights that the challenge to suppress non-radiative recombination losses in perovskite cells on their way to the radiative limit lies in proper energy level alignment and in suppression of defect recombination at the interfaces.
Perovskite solar cells (PSCs) are currently one of the most promising photovoltaic technologies for highly efficient and cost-effective solar energy production. In only a few years, an unprecedented progression of preparation procedures and material compositions delivered lab-scale devices that have now reached record power conversion efficiencies (PCEs) higher than 20%, competing with most established solar cell materials such as silicon, CIGS, and CdTe. However, despite a large number of researchers currently involved in this topic, only a few groups in the world can reproduce >20% efficiencies on a regular n-i-p architecture. In this work, we present detailed protocols for preparing PSCs in regular (n-i-p) and inverted (p-i-n) architectures with >= 20% PCE. We aim to provide a comprehensive, reproducible description of our device fabrication , protocols. We encourage the practice of reporting detailed and transparent protocols that can be more easily reproduced by other laboratories. A better reporting standard may, in turn, accelerate the development of perovskite solar cells and related research fields.