Double cell upsets mitigation through triple modular redundancy
- A triple modular redundancy (TMR) based design technique for double cell upsets (DCUs) mitigation is investigated in this paper. This technique adds three extra self-voter circuits into a traditional TMR structure to enable the enhanced error correction capability. Fault-injection simulations show that the soft error rate (SER) of the proposed technique is lower than 3% of that of TMR. The implementation of this proposed technique is compatible with the automatic digital design flow, and its applicability and performance are evaluated on an FIFO circuit.
| Author details: | Yuanqing Li, Anselm BreitenreiterORCiD, Marko AndjelkovicORCiDGND, Junchao ChenORCiDGND, Milan Babic, Miloš KrstićORCiDGND |
|---|---|
| DOI: | https://doi.org/10.1016/j.mejo.2019.104683 |
| ISSN: | 0026-2692 |
| ISSN: | 1879-2391 |
| Title of parent work (English): | Microelectronics Journal |
| Publisher: | Elsevier |
| Place of publishing: | Oxford |
| Publication type: | Article |
| Language: | English |
| Date of first publication: | 2019/12/19 |
| Publication year: | 2020 |
| Release date: | 2023/03/22 |
| Tag: | Double cell upsets (DCUs); Triple modular redundancy (TMR) |
| Volume: | 96 |
| Article number: | 104683 |
| Number of pages: | 8 |
| Funding institution: | European UnionEuropean Commission [640243] |
| Organizational units: | Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik und Computational Science |
| DDC classification: | 5 Naturwissenschaften und Mathematik / 50 Naturwissenschaften |
| Peer review: | Referiert |
