X-tolerant test data compaction with accelerated shift registers
- Using the timing flexibility of modern automatic test equipment (ATE) test response data can be compacted without the need for additional X-masking logic. In this article the test response is compacted by several multiple input shift registers without feedback (NF-MISR). The shift registers are running on a k-times higher clock frequency than the test clock. For each test clock cycle only one out of the k outputs of each shift register is evaluated by the ATE. The impact of consecutive X values within the scan chains is reduced by a periodic permutation of the NF-MISR inputs. As a result, no additional external control signals or test set dependent control logic is required. The benefits of the proposed method are shown by the example of an implementation on a Verigy ATE. Experiments on three industrial circuits demonstrate the effectiveness of the proposed approach in comparison to a commercial DFT solution.
Author details: | Martin Hilscher, Michael BraunGND, Michael Richter, Andreas Leininger, Michael GösselGND |
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URL: | http://www.springerlink.com/content/100286 |
DOI: | https://doi.org/10.1007/s10836-009-5107-5 |
ISSN: | 0923-8174 |
Publication type: | Article |
Language: | English |
Year of first publication: | 2009 |
Publication year: | 2009 |
Release date: | 2017/03/25 |
Source: | Journal of electronic testing. - ISSN 0923-8174. - 25 (2009), 4-5, S. 247 - 258 |
Organizational units: | Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik und Computational Science |
Peer review: | Referiert |
Institution name at the time of the publication: | Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik |