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Highly efficient test response compaction using a hierarchical x-masking technique

  • This paper presents a highly effective compactor architecture for processing test responses with a high percentage of x-values. The key component is a hierarchical configurable masking register, which allows the compactor to dynamically adapt to and provide excellent performance over a wide range of x-densities. A major contribution of this paper is a technique that enables the efficient loading of the x-masking data into the masking logic in a parallel fashion using the scan chains. A method for eliminating the requirement for dedicated mask control signals using automated test equipment timing flexibility is also presented. The proposed compactor is especially suited to multisite testing. Experiments with industrial designs show that the proposed compactor enables compaction ratios exceeding 200x.

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Metadaten
Author:Thomas Rabenalt, Michael Richter, Frank Pöhl, Michael Gössel
DOI:https://doi.org/10.1109/TCAD.2011.2181847
ISSN:0278-0070 (print)
Parent Title (English):IEEE transactions on computer-aided design of integrated circuits and systems
Publisher:Inst. of Electr. and Electronics Engineers
Place of publication:Piscataway
Document Type:Article
Language:English
Year of first Publication:2012
Year of Completion:2012
Release Date:2017/03/26
Tag:Design for testability (DFT); X-masking; X-values; test response compaction
Volume:31
Issue:6
Pagenumber:8
First Page:950
Last Page:957
Funder:MAYA, German Federal Ministry for Education and Research, [01M3063A]
Organizational units:Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik und Computational Science
Peer Review:Referiert
Institution name at the time of publication:Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik