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Efficient logic verification in a synthesis environment

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Author details:Wolfgang Kunz, S. M. Reddy, M. Subodh, D. K. Pradhan
Publication type:Article
Language:English
Year of first publication:1996
Publication year:1996
Release date:2017/03/25
Source:IEEE transaction on computer-aided design of integrated circuits and sysems. - 15 (1996), 1, S. 20 - 32
Organizational units:Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik und Computational Science
Institution name at the time of the publication:Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik
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