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Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree

  • The soft error rate (SER) due to heavy-ion irradiation of a clock tree is investigated in this paper. A method for clock tree SER prediction is developed, which employs a dedicated soft error analysis tool to characterize the single-event transient (SET) sensitivities of clock inverters and other commercial tools to calculate the SER through fault-injection simulations. A test circuit including a flip-flop chain and clock tree in a 65 nm CMOS technology is developed through the automatic ASIC design flow. This circuit is analyzed with the developed method to calculate its clock tree SER. In addition, this circuit is implemented in a 65 nm test chip and irradiated by heavy ions to measure its SER resulting from the SETs in the clock tree. The experimental and calculation results of this case study present good correlation, which verifies the effectiveness of the developed method.

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Author details:Yuanqing Li, Li Chen, Issam Nofal, Mo Chen, Haibin WangORCiD, Rui Liu, Qingyu Chen, Miloš KrstićORCiDGND, Shuting Shi, Gang Guo, Sang H. Baeg, Shi-Jie Wen, Richard Wong
DOI:https://doi.org/10.1016/j.microrel.2018.05.016
ISSN:0026-2714
Title of parent work (English):Microelectronics reliability
Publisher:Elsevier
Place of publishing:Oxford
Publication type:Article
Language:English
Date of first publication:2018/06/06
Publication year:2018
Release date:2021/10/27
Tag:Clock tree; Modeling; Single-event transient (SET)
Volume:87
Number of pages:9
First page:24
Last Page:32
Funding institution:Natural Sciences and Engineering Research Council of Canada (NSERC)Natural Sciences and Engineering Research Council of Canada; CMC Microsystems
Organizational units:Mathematisch-Naturwissenschaftliche Fakultät / Institut für Informatik und Computational Science
DDC classification:6 Technik, Medizin, angewandte Wissenschaften / 60 Technik / 600 Technik, Technologie
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