TY  - JOUR
A1  - Kundu, S.
A1  - Sogomonyan, Egor S.
A1  - Gössel, Michael
A1  - Tarnick, Steffen
T1  - Self-checking comparator with one periodiv output
Y1  - 1996
ER  - 
TY  - JOUR
A1  - Hartje, Hendrik
A1  - Sogomonyan, Egor S.
A1  - Gössel, Michael
T1  - Code disjoint circuits for partity codes
Y1  - 1997
ER  - 
TY  - JOUR
A1  - Bogue, Ted
A1  - Jürgensen, Helmut
A1  - Gössel, Michael
T1  - BIST with negligible aliasing through random cover circuits
Y1  - 1995
ER  - 
TY  - JOUR
A1  - Rabenalt, Thomas
A1  - Richter, Michael
A1  - Pöhl, Frank
A1  - Gössel, Michael
T1  - Highly efficient test response compaction using a hierarchical x-masking technique
JF  - IEEE transactions on computer-aided design of integrated circuits and systems
N2  - This paper presents a highly effective compactor architecture for processing test responses with a high percentage of x-values. The key component is a hierarchical configurable masking register, which allows the compactor to dynamically adapt to and provide excellent performance over a wide range of x-densities. A major contribution of this paper is a technique that enables the efficient loading of the x-masking data into the masking logic in a parallel fashion using the scan chains. A method for eliminating the requirement for dedicated mask control signals using automated test equipment timing flexibility is also presented. The proposed compactor is especially suited to multisite testing. Experiments with industrial designs show that the proposed compactor enables compaction ratios exceeding 200x.
KW  - Design for testability (DFT)
KW  - test response compaction
KW  - X-masking
KW  - X-values
Y1  - 2012
U6  - https://doi.org/10.1109/TCAD.2011.2181847
SN  - 0278-0070
VL  - 31
IS  - 6
SP  - 950
EP  - 957
PB  - Inst. of Electr. and Electronics Engineers
CY  - Piscataway
ER  - 
TY  - JOUR
A1  - Hilscher, Martin
A1  - Braun, Michael
A1  - Richter, Michael
A1  - Leininger, Andreas
A1  - Gössel, Michael
T1  - X-tolerant test data compaction with accelerated shift registers
N2  - Using the timing flexibility of modern automatic test equipment (ATE) test response data can be compacted without the need for additional X-masking logic. In this article the test response is compacted by several multiple input shift registers without feedback (NF-MISR). The shift registers are running on a k-times higher clock frequency than the test clock. For each test clock cycle only one out of the k outputs of each shift register is evaluated by the ATE. The impact of consecutive X values within the scan chains is reduced by a periodic permutation of the NF-MISR inputs. As a result, no additional external control signals or test set dependent control logic is required. The benefits of the proposed method are shown by the example of an implementation on a Verigy ATE. Experiments on three industrial circuits demonstrate the effectiveness of the proposed approach in comparison to a commercial DFT solution.
Y1  - 2009
UR  - http://www.springerlink.com/content/100286
U6  - https://doi.org/10.1007/s10836-009-5107-5
SN  - 0923-8174
ER  - 
TY  - JOUR
A1  - Gössel, Michael
A1  - Sogomonyan, Egor S.
T1  - A new self-testing parity checker for ultra-reliable applications
Y1  - 1996
ER  - 
TY  - JOUR
A1  - Gerber, Stefan
A1  - Gössel, Michael
T1  - Detection of permanent faults of a floating point adder by pseudoduplication
Y1  - 1994
ER  - 
TY  - JOUR
A1  - Bhattacharya, M. K.
A1  - Dimitriev, Alexej
A1  - Gössel, Michael
T1  - Zero-aliasing space compresion using a single periodic output and its application to testing of embedded
Y1  - 2000
ER  - 
TY  - JOUR
A1  - Dimitriev, Alexej
A1  - Saposhnikov, V. V.
A1  - Saposhnikov, Vl. V.
A1  - Gössel, Michael
T1  - Concurrent checking of sequential circuits by alternating inputs
Y1  - 1999
ER  - 
TY  - JOUR
A1  - Saposhnikov, Vl. V.
A1  - Otscheretnij, Vitalij
A1  - Saposhnikov, V. V.
A1  - Gössel, Michael
T1  - Design of Fault-Tolerant Circuits by self-dual Duplication
Y1  - 1998
ER  - 
TY  - JOUR
A1  - Moschanin, Wladimir
A1  - Saposhnikov, Vl. V.
A1  - Saposhnikov, Va. V.
A1  - Gössel, Michael
T1  - Synthesis of self-dual multi-output combinational circuits for on-line Teting
Y1  - 1996
ER  - 
TY  - JOUR
A1  - Seuring, Markus
A1  - Gössel, Michael
A1  - Sogomonyan, Egor S.
T1  - Ein strukturelles Verfahren zur Kompaktierung von Schaltungsausgaben für online-Fehlererkennungen und Selbstests
Y1  - 1998
ER  - 
TY  - JOUR
A1  - Sogomonyan, Egor S.
A1  - Gössel, Michael
T1  - Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems
Y1  - 1996
ER  - 
TY  - JOUR
A1  - Morosov, Andrej
A1  - Gössel, Michael
A1  - Hartje, Hendrik
T1  - Reduced area overhead of the input party for code-disjoint circuits
Y1  - 1999
ER  - 
TY  - JOUR
A1  - Seuring, Markus
A1  - Gössel, Michael
T1  - A structural method for output compaction of sequential automata implemented as circuits
Y1  - 1999
ER  - 
TY  - BOOK
A1  - Seuring, Markus
A1  - Gössel, Michael
T1  - A structural approach for space compaction for sequential circuits
T3  - Preprint / Universität Potsdam, Institut für Informatik
Y1  - 1998
SN  - 0946-7580
VL  - 1998, 05
PB  - Univ.
CY  - Potsdam
ER  - 
TY  - JOUR
A1  - Hlawiczka, A.
A1  - Gössel, Michael
A1  - Sogomonyan, Egor S.
T1  - A linear code-preserving signature analyzer COPMISR
Y1  - 1997
SN  - 0-8186-7810-0
ER  - 
TY  - JOUR
A1  - Bogue, Ted
A1  - Gössel, Michael
A1  - Jürgensen, Helmut
A1  - Zorian, Yervant
T1  - Built-in self-Test with an alternating output
Y1  - 1998
SN  - 0-8186-8359-7
ER  - 
TY  - JOUR
A1  - Otscheretnij, Vitalij
A1  - Gössel, Michael
A1  - Saposhnikov, Vl. V.
A1  - Saposhnikov, V. V.
T1  - Fault-tolerant self-dual circuits with error detection by parity- and group parity prediction
Y1  - 1998
ER  - 
TY  - JOUR
A1  - Sogomonyan, Egor S.
A1  - Singh, Adit D.
A1  - Gössel, Michael
T1  - A multi-mode scannable memory element for high test application efficiency and delay testing
Y1  - 1998
ER  - 
TY  - JOUR
A1  - Dimitriev, Alexej
A1  - Saposhnikov, Vl. V.
A1  - Gössel, Michael
A1  - Saposhnikov, V. V.
T1  - Self-dual duplication - a new method for on-line testing
Y1  - 1997
ER  - 
TY  - JOUR
A1  - Saposhnikov, Vl. V.
A1  - Moshanin, Vl.
A1  - Saposhnikov, V. V.
A1  - Gössel, Michael
T1  - Self-dual multi output combinational circuits with output data compaction
Y1  - 1997
ER  - 
TY  - BOOK
A1  - Seuring, Markus
A1  - Gössel, Michael
A1  - Sogomonyan, Egor S.
T1  - A structural approach for space compaction for concurrent checking and BIST
T3  - Preprint / Universität Potsdam, Institut für Informatik
Y1  - 1997
SN  - 0946-7580
VL  - 1997, 01
PB  - Univ. Potsdam
CY  - Potsdam [u.a.]
ER  - 
TY  - JOUR
A1  - Gössel, Michael
A1  - Sogomonyan, Egor S.
T1  - On-line Test auf der Grundlage eines die Parität erhaltenden Signaturanalysators
Y1  - 1998
ER  - 
TY  - JOUR
A1  - Morosov, Andrej
A1  - Saposhnikov, V. V.
A1  - Gössel, Michael
T1  - Self-Checking circuits with unidiectionally independent outputs
Y1  - 1998
ER  -