TY - JOUR A1 - Gerber, Stefan A1 - Gössel, Michael T1 - Detection of permanent faults of a floating point adder by pseudoduplication Y1 - 1994 ER - TY - BOOK A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. A1 - Morozov, Alexei A1 - Gössel, Michael T1 - Necessary and Sufficient Conditions for the Existence of Self-Checking Circuits ba Use of Complementary Circuits T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 2004 SN - 0946-7580 VL - 2004, 1 PB - Univ. CY - Potsdam ER - TY - BOOK A1 - Marienfeld, Daniel A1 - Sogomonyan, Egor S. A1 - Ocheretnij, V. A1 - Gössel, Michael T1 - Self-checking Output-duplicated Booth-2 Multiplier T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 2005 SN - 0946-7580 VL - 2005, 1 PB - Univ. CY - Potsdam ER - TY - BOOK A1 - Sogomonyan, Egor S. A1 - Marienfeld, Daniel A1 - Gössel, Michael T1 - Fehlerkorrektur und Fehlererkennung T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 2006 SN - 0946-7580 VL - 2006, 3 PB - Univ. CY - Potsdam ER - TY - BOOK A1 - Börner, Ferdinand A1 - Gössel, Michael T1 - Grundlagen digitaler Systeme Y1 - 2005 SN - 978-3-937786-46-9 PB - Univ.-Verl. CY - Potsdam ER - TY - JOUR A1 - Ocheretnij, Vitalij A1 - Gössel, Michael A1 - Sogomonyan, Egor S. A1 - Marienfeld, Daniel T1 - Modulo p=3 checking for a carry select adder N2 - In this paper a self-checking carry select adder is proposed. The duplicated adder blocks which are inherent to a carry select adder without error detection are checked modulo 3. Compared to a carry select adder without error detection the delay of the MSB of the sum of the proposed adder does not increase. Compared to a self-checking duplicated carry select adder the area is reduced by 20%. No restrictions are imposed on the design of the adder blocks Y1 - 2006 UR - http://www.springerlink.com/content/100286 U6 - https://doi.org/10.1007/s10836-006-6260-8 ER - TY - JOUR A1 - Singh, Adit D. A1 - Sogomonyan, Egor S. A1 - Gössel, Michael A1 - Seuring, Markus T1 - Testability evaluation of sequential designs incorporating the multi-mode scannable memory element Y1 - 1999 ER - TY - JOUR A1 - Dimitriev, Alexej A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - Concurrent checking of sequential circuits by alternating inputs Y1 - 1999 ER - TY - JOUR A1 - Otscheretnij, Vitalij A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Fault-tolerant self-dual circuits Y1 - 1999 ER - TY - JOUR A1 - Saposhnikov, Vl. V. V. V. A1 - Moshanin, Vl. A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Experimental results for self-dual multi-output combinational circuits Y1 - 1999 ER - TY - JOUR A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael A1 - Morosov, Andrej T1 - A method of construction of combinational self-checking units with detection of all single faults Y1 - 1999 ER - TY - JOUR A1 - Gössel, Michael A1 - Dimitriev, Alexej A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. T1 - Eine selbsttestende Struktur zur on-line Fehlererkennung in kombinatorischen Schaltungen Y1 - 1999 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Ocheretnij, V. A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Modified TMR-system with reduced hardware overhead Y1 - 1999 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - New totally self-checking ripple and carry look-ahead adders Y1 - 1999 ER - TY - BOOK A1 - Börner, Ferdinand A1 - Gössel, Michael T1 - Grundlagen digitaler Systeme Y1 - 2000 SN - 3-9806494-9-0 PB - Univ.-Bibliothek Publ.-Stelle CY - Potsdam ER - TY - JOUR A1 - Seuring, Markus A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Ein strukturelles Verfahren zur Kompaktierung von Schaltungsausgaben für online-Fehlererkennungen und Selbstests Y1 - 1998 ER - TY - JOUR A1 - Saposhnikov, V. V. A1 - Morosov, Andrej A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - A new design method for self-checking unidirectional combinational circuits Y1 - 1998 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. A1 - Morosov, Andrej T1 - A new totally error propagating compactor for arbitrary cores with digital interfaces Y1 - 1999 ER - TY - JOUR A1 - Seuring, Markus A1 - Gössel, Michael T1 - A structural approach for space compaction for sequential circuits Y1 - 1999 ER - TY - JOUR A1 - Morosov, Andrej A1 - Gössel, Michael A1 - Hartje, Hendrik T1 - Reduced area overhead of the input party for code-disjoint circuits Y1 - 1999 ER - TY - JOUR A1 - Seuring, Markus A1 - Gössel, Michael T1 - A structural method for output compaction of sequential automata implemented as circuits Y1 - 1999 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - On-line Test auf der Grundlage eines die Parität erhaltenden Signaturanalysators Y1 - 1998 ER - TY - JOUR A1 - Morosov, Andrej A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Self-Checking circuits with unidiectionally independent outputs Y1 - 1998 ER - TY - BOOK A1 - Seuring, Markus A1 - Gössel, Michael T1 - A structural approach for space compaction for sequential circuits T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 1998 SN - 0946-7580 VL - 1998, 05 PB - Univ. CY - Potsdam ER - TY - JOUR A1 - Hlawiczka, A. A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A linear code-preserving signature analyzer COPMISR Y1 - 1997 SN - 0-8186-7810-0 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Otscheretnij, Vitalij A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Design of Fault-Tolerant Circuits by self-dual Duplication Y1 - 1998 ER - TY - JOUR A1 - Bogue, Ted A1 - Gössel, Michael A1 - Jürgensen, Helmut A1 - Zorian, Yervant T1 - Built-in self-Test with an alternating output Y1 - 1998 SN - 0-8186-8359-7 ER - TY - JOUR A1 - Otscheretnij, Vitalij A1 - Gössel, Michael A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, V. V. T1 - Fault-tolerant self-dual circuits with error detection by parity- and group parity prediction Y1 - 1998 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Singh, Adit D. A1 - Gössel, Michael T1 - A multi-mode scannable memory element for high test application efficiency and delay testing Y1 - 1998 ER - TY - JOUR A1 - Seuring, Markus A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A structural approach for space compaction for concurrent checking and BIST Y1 - 1998 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, V. V. A1 - Dimitriev, Alexej A1 - Gössel, Michael T1 - Self-dual duplication for error detection Y1 - 1998 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Singh, Adit D. A1 - Gössel, Michael T1 - A scan based concrrent BIST approach for low cost on-line testing Y1 - 1998 ER - TY - JOUR A1 - Hartje, Hendrik A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Synthesis of code-disjoint combinational circuits Y1 - 1997 ER - TY - JOUR A1 - Saposhnikov, Va. V. A1 - Morosov, Andrej A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - Design of self-checking unidirectional combinational circuits with low area overhead Y1 - 1996 ER - TY - JOUR A1 - Morosov, Andrej A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - Ein Transformationsalgorithmus einer kombinatorischen Schaltung in eine monotone Schaltung Y1 - 1997 ER - TY - JOUR A1 - Dimitriev, Alexej A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael A1 - Saposhnikov, V. V. T1 - On-line testing by self-dual duplication Y1 - 1997 ER - TY - JOUR A1 - Dimitriev, Alexej A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael A1 - Saposhnikov, V. V. T1 - Self-dual duplication - a new method for on-line testing Y1 - 1997 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Moshanin, Vl. A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Self-dual multi output combinational circuits with output data compaction Y1 - 1997 ER - TY - JOUR A1 - Morosov, Andrej A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Design of self dual fault-secure combinational circuits Y1 - 1997 ER - TY - BOOK A1 - Seuring, Markus A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A structural approach for space compaction for concurrent checking and BIST T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 1997 SN - 0946-7580 VL - 1997, 01 PB - Univ. Potsdam CY - Potsdam [u.a.] ER - TY - JOUR A1 - Hartje, Hendrik A1 - Sogomonyan, Egor S. A1 - Gössel, Michael T1 - Code disjoint circuits for partity codes Y1 - 1997 ER - TY - JOUR A1 - Moschanin, Wladimir A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, Va. V. A1 - Gössel, Michael T1 - Synthesis of self-dual multi-output combinational circuits for on-line Teting Y1 - 1996 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Dimitriev, Alexej A1 - Gössel, Michael A1 - Saposhnikov, Va. V. T1 - Self-dual parity checking - a new method for on-line testing Y1 - 1996 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A new self-testing parity checker for ultra-reliable applications Y1 - 1996 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Gössel, Michael T1 - Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems Y1 - 1996 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A parity-preserving multi-input signature analyzer and it application for concurrent checking and BIST Y1 - 1996 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Self-parity combinational-circuits for self-testing, concurrent fault-detection and parity scan design Y1 - 1994 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Gössel, Michael T1 - A new parity preserving multi-input signature analyser Y1 - 1995 ER - TY - JOUR A1 - Kundu, S. A1 - Sogomonyan, Egor S. A1 - Gössel, Michael A1 - Tarnick, Steffen T1 - Self-checking comparator with one periodiv output Y1 - 1996 ER - TY - JOUR A1 - Bogue, Ted A1 - Jürgensen, Helmut A1 - Gössel, Michael T1 - BIST with negligible aliasing through random cover circuits Y1 - 1995 ER - TY - JOUR A1 - Rabenalt, Thomas A1 - Richter, Michael A1 - Pöhl, Frank A1 - Gössel, Michael T1 - Highly efficient test response compaction using a hierarchical x-masking technique JF - IEEE transactions on computer-aided design of integrated circuits and systems N2 - This paper presents a highly effective compactor architecture for processing test responses with a high percentage of x-values. The key component is a hierarchical configurable masking register, which allows the compactor to dynamically adapt to and provide excellent performance over a wide range of x-densities. A major contribution of this paper is a technique that enables the efficient loading of the x-masking data into the masking logic in a parallel fashion using the scan chains. A method for eliminating the requirement for dedicated mask control signals using automated test equipment timing flexibility is also presented. The proposed compactor is especially suited to multisite testing. Experiments with industrial designs show that the proposed compactor enables compaction ratios exceeding 200x. KW - Design for testability (DFT) KW - test response compaction KW - X-masking KW - X-values Y1 - 2012 U6 - https://doi.org/10.1109/TCAD.2011.2181847 SN - 0278-0070 VL - 31 IS - 6 SP - 950 EP - 957 PB - Inst. of Electr. and Electronics Engineers CY - Piscataway ER - TY - JOUR A1 - Hilscher, Martin A1 - Braun, Michael A1 - Richter, Michael A1 - Leininger, Andreas A1 - Gössel, Michael T1 - X-tolerant test data compaction with accelerated shift registers N2 - Using the timing flexibility of modern automatic test equipment (ATE) test response data can be compacted without the need for additional X-masking logic. In this article the test response is compacted by several multiple input shift registers without feedback (NF-MISR). The shift registers are running on a k-times higher clock frequency than the test clock. For each test clock cycle only one out of the k outputs of each shift register is evaluated by the ATE. The impact of consecutive X values within the scan chains is reduced by a periodic permutation of the NF-MISR inputs. As a result, no additional external control signals or test set dependent control logic is required. The benefits of the proposed method are shown by the example of an implementation on a Verigy ATE. Experiments on three industrial circuits demonstrate the effectiveness of the proposed approach in comparison to a commercial DFT solution. Y1 - 2009 UR - http://www.springerlink.com/content/100286 U6 - https://doi.org/10.1007/s10836-009-5107-5 SN - 0923-8174 ER - TY - JOUR A1 - Bogue, Ted A1 - Jürgensen, Helmut A1 - Gössel, Michael T1 - Design of cover circuits for monitoring the output of a MISR Y1 - 1994 SN - 0-8186-6307-3 , 0-8186-6306-5 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Code disjoint self-parity combinational circuits for self-testing, concurrent fault detection and parity scan design Y1 - 1994 ER - TY - JOUR A1 - Gössel, Michael A1 - Morosov, Andrej A1 - Saposhnikov, V. V. A1 - Saposhnikov, VL. V. T1 - Design of combinational self-testing devices with unidirectionally independent outputs Y1 - 1994 ER - TY - JOUR A1 - Dmitriev, Alexej A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - Self-dual sequential circuits for concurrent chechking Y1 - 1999 SN - 0-7695-0390-X ; 0-7695-0391-8 ER - TY - JOUR A1 - Bhattacharya, M. K. A1 - Dimitriev, Alexej A1 - Gössel, Michael T1 - Zero-aliasing space compresion using a single periodic output and its application to testing of embedded Y1 - 2000 ER - TY - BOOK A1 - Sogomonyan, Egor S. A1 - Marienfeld, Daniel A1 - Ocheretnij, V. A1 - Gössel, Michael T1 - A new self-checking sum-bit duplicated carry-select adder T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 2003 SN - 0946-7580 VL - 2003, 5 PB - Univ. CY - Potsdam ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Singh, Adit D. A1 - Gössel, Michael T1 - A multi-mode scannable memory element for high test application efficiency and delay testing Y1 - 1999 ER - TY - BOOK A1 - Wu, K. A1 - Karri, R. A1 - Kuznetsov, Grigory A1 - Gössel, Michael T1 - Low Cost Concurrent Error Detection for the Advanced Encryption Standart T3 - Preprint / Universität Potsdam, Institut für Informatik Y1 - 2003 SN - 0946-7580 VL - 2003, 8 PB - Univ. CY - Potsdam ER - TY - BOOK A1 - Börner, Ferdinand A1 - Gössel, Michael ED - Gössel, Michael T1 - Grundlagen digitaler Systeme Y1 - 2001 SN - 3-935024-34-7 SN - 978-3-935024-34-1 PB - Univ.-Bibliothek Publ.-Stelle CY - Potsdam ER - TY - BOOK A1 - Sapoznikov, V. V. A1 - Sapoznikov, VL. V. A1 - Gössel, Michael T1 - Samodvojstvennye diskretnye ustrojstva Y1 - 2001 SN - 5-283-04748-2 PB - ?nergoatomizdat CY - Sankt-Peterburg ER - TY - JOUR A1 - Gössel, Michael T1 - A new method of redundancy addition for circuit optimization JF - Preprint / Universität Potsdam, Institut für Informatik Y1 - 1999 SN - 0946-7580 VL - 1999, 08 PB - Univ. CY - Potsdam ER -