TY - JOUR A1 - Besnard, Philippe A1 - Schaub, Torsten H. T1 - A context-based framework for default logics Y1 - 1993 SN - 0-262-51071-5 ER - TY - JOUR A1 - Gerber, Stefan A1 - Gössel, Michael T1 - Detection of permanent faults of a floating point adder by pseudoduplication Y1 - 1994 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Self-parity combinational-circuits for self-testing, concurrent fault-detection and parity scan design Y1 - 1994 ER - TY - JOUR A1 - Bogue, Ted A1 - Jürgensen, Helmut A1 - Gössel, Michael T1 - Design of cover circuits for monitoring the output of a MISR Y1 - 1994 SN - 0-8186-6307-3 , 0-8186-6306-5 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Code disjoint self-parity combinational circuits for self-testing, concurrent fault detection and parity scan design Y1 - 1994 ER - TY - JOUR A1 - Gössel, Michael A1 - Morosov, Andrej A1 - Saposhnikov, V. V. A1 - Saposhnikov, VL. V. T1 - Design of combinational self-testing devices with unidirectionally independent outputs Y1 - 1994 ER - TY - JOUR A1 - Richter, Peter T1 - Efficient shortest path algorithms for road traffic optimization Y1 - 1994 ER - TY - BOOK A1 - Schröder-Preikschat, Wolfgang T1 - The logical design of parallel operating systems Y1 - 1994 PB - Prentice Hall International CY - Englewood Cliffs ER - TY - JOUR A1 - Schröder-Preikschat, Wolfgang T1 - PEACE - software backplane for parallel computing Y1 - 1994 ER - TY - JOUR A1 - Sommerfeld, Erdmute T1 - Operations on cognitive structures : their modelling on the basis of graph theory Y1 - 1994 ER - TY - JOUR A1 - Kunz, Wolfgang A1 - Pradhan, D. K. T1 - Recursive learning : a new implication technique for efficient solutions to CAD problems : test, verification and optimization Y1 - 1994 ER - TY - JOUR A1 - Tarnick, Steffen T1 - Bounding error masking in linear output space compression schemes Y1 - 1994 ER - TY - JOUR A1 - Tarnick, Steffen T1 - Controllable self-checking checkers for conditional concurrent checking Y1 - 1994 ER - TY - JOUR A1 - Böhlau, Peter T1 - Zero aliasing compression based on groups of weakly independent outputs in circuits with high complexity for two fault models Y1 - 1994 ER - TY - JOUR A1 - Kunz, Wolfgang A1 - Menon, P. T1 - Multi-level logic optimization by implication analysis Y1 - 1994 SN - 0-89791-690-5 SN - 0-8186-6416-9 SN - 0-8186-6417-7 ER - TY - JOUR A1 - Cobernuss, M. T1 - Bused interconnection network for parallel memory with linear storage Y1 - 1994 SN - 3-05-501602-5 ER - TY - THES A1 - Gerber, Stefan T1 - Using software for fault detection in arithmetical circuits Y1 - 1995 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Gössel, Michael T1 - A new parity preserving multi-input signature analyser Y1 - 1995 ER - TY - JOUR A1 - Bogue, Ted A1 - Jürgensen, Helmut A1 - Gössel, Michael T1 - BIST with negligible aliasing through random cover circuits Y1 - 1995 ER - TY - JOUR A1 - Gohlke, Mario T1 - A new approach for model-based recognition using colour regions Y1 - 1995 ER - TY - JOUR A1 - Tarnick, Steffen T1 - Controllable self-checking checkers for conditional concurrent checking Y1 - 1995 ER - TY - JOUR A1 - Hellebrand, Sybille A1 - Rajski, Janusz A1 - Tarnick, Steffen A1 - Venkatraman, Srikanth A1 - Courtois, Bernard T1 - Built-in test for circuits with scan based on reseeding of multiole polynomial linear feedback shift registers Y1 - 1995 ER - TY - JOUR A1 - Havemann, Ulrich A1 - Grivtsov, A. G. A1 - Merkulenko, N. N. T1 - Molecular dynamics simulation of the association of model colloidal particles in two dimensions Y1 - 1995 ER - TY - JOUR A1 - Richter, Peter T1 - A new deterministic approach for the optimization of cable layouts for power supply systems Y1 - 1995 ER - TY - BOOK ED - Schröder-Preikschat, Wolfgang ED - Wu, Min-You T1 - The journal of supercomputing : trends in parallel operating systems Y1 - 1995 PB - Kluwer CY - Boston ER - TY - JOUR A1 - Schröder-Preikschat, Wolfgang T1 - Experience developing an object-oriented parallel operating system Y1 - 1995 ER - TY - JOUR A1 - Schröder-Preikschat, Wolfgang A1 - Giloi, Wolfgang K. T1 - The next generation parallel architecture - multiple executing threads Y1 - 1995 ER - TY - THES A1 - Tarnick, Steffen T1 - Data compression techniques for concurrent error detection and built-in self test Y1 - 1995 ER - TY - JOUR A1 - Reddy, S. M. A1 - Kunz, Wolfgang A1 - Pradhan, D. K. T1 - Novel verification framework combining structural and OBDD methods in a synthesis environment Y1 - 1995 SN - 0-8186-7213-7 SN - 0-8186-7214-5 ER - TY - JOUR A1 - Chatterjee, M. A1 - Pradhan, D. K. A1 - Kunz, Wolfgang T1 - ATPG-based Transformations for random-pattern testable logic synthesis Y1 - 1995 SN - 0-8186-7213-7 SN - 0-8186-7214-5 SN - 0-8186-7215-3 ER - TY - JOUR A1 - Linke, Thomas A1 - Schaub, Torsten H. T1 - Lemma handling in default logic theorem provers Y1 - 1995 SN - 3540601120 ER - TY - JOUR A1 - Besnard, Philippe A1 - Schaub, Torsten H. T1 - An approach to context-based default reasoning Y1 - 1995 SN - 0169-2968 ER - TY - JOUR A1 - Thielscher, Michael A1 - Schaub, Torsten H. T1 - Default reasoning by deductive planning Y1 - 1995 ER - TY - JOUR A1 - Saposhnikov, Va. V. A1 - Morosov, Andrej A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - Design of self-checking unidirectional combinational circuits with low area overhead Y1 - 1996 ER - TY - JOUR A1 - Moschanin, Wladimir A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, Va. V. A1 - Gössel, Michael T1 - Synthesis of self-dual multi-output combinational circuits for on-line Teting Y1 - 1996 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Dimitriev, Alexej A1 - Gössel, Michael A1 - Saposhnikov, Va. V. T1 - Self-dual parity checking - a new method for on-line testing Y1 - 1996 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A new self-testing parity checker for ultra-reliable applications Y1 - 1996 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Gössel, Michael T1 - Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems Y1 - 1996 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A parity-preserving multi-input signature analyzer and it application for concurrent checking and BIST Y1 - 1996 ER - TY - JOUR A1 - Kundu, S. A1 - Sogomonyan, Egor S. A1 - Gössel, Michael A1 - Tarnick, Steffen T1 - Self-checking comparator with one periodiv output Y1 - 1996 ER - TY - JOUR A1 - Schaub, Torsten H. A1 - Brüning, Stefan T1 - Prolog technology for default reasoning Y1 - 1996 SN - 0-471-96809-9 ER - TY - JOUR A1 - Besnard, Philippe A1 - Schaub, Torsten H. T1 - A simple signed system for paraconsistent reasoning Y1 - 1996 SN - 3-540-61630-6 ER - TY - JOUR A1 - Schaub, Torsten H. A1 - Thielscher, Michael T1 - Skeptical query-answering in constrained default logic Y1 - 1996 SN - 3-540-61313-7 ER - TY - JOUR A1 - Schaub, Torsten H. A1 - Brüning, Stefan A1 - Nicolas, Pascal T1 - XRay : a prolog technology theorem prover for default reasoning: a system description Y1 - 1996 SN - 3-540-61511-3 ER - TY - JOUR A1 - Linke, Thomas A1 - Schaub, Torsten H. T1 - Putting default logics in perspective Y1 - 1996 SN - 3-540-61708-6 ER - TY - JOUR A1 - Brüning, Stefan A1 - Schaub, Torsten H. T1 - A model-based approach to consistency-checking Y1 - 1996 SN - 3-540-61286-6 ER - TY - JOUR A1 - Horn, Erika A1 - Koutzevlov, Atanas A1 - Rätsch, Gunnar A1 - Schubert, Wolfgang A1 - Tschapek, Alexej T1 - Software system specification JF - HGG-Dokument Y1 - 1996 VL - UPHGG.010.4 PB - Univ. CY - Potsdam ER - TY - JOUR A1 - Schröder-Preikschat, Wolfgang A1 - Garnatz, Thomas A1 - Haack, Ute A1 - Sander, Michael T1 - Experience made with the design and development of a message-passing kernel for a dual-processor-node parallel computer Y1 - 1996 ER - TY - JOUR A1 - Horn, Erika A1 - Neuhaus, Alexander A1 - Rätsch, Gunnar A1 - Schubert, Wolfgang A1 - Tschapek, Alexej T1 - Software development plan JF - HGG-Dokument Y1 - 1996 VL - UPHGG.002.4 PB - Univ. CY - Potsdam ER - TY - THES A1 - Kunz, Wolfgang T1 - Testing techniques in logic synthesis Y1 - 1996 ER -