TY - JOUR A1 - Hilscher, Martin A1 - Braun, Michael A1 - Richter, Michael A1 - Leininger, Andreas A1 - Gössel, Michael T1 - X-tolerant test data compaction with accelerated shift registers N2 - Using the timing flexibility of modern automatic test equipment (ATE) test response data can be compacted without the need for additional X-masking logic. In this article the test response is compacted by several multiple input shift registers without feedback (NF-MISR). The shift registers are running on a k-times higher clock frequency than the test clock. For each test clock cycle only one out of the k outputs of each shift register is evaluated by the ATE. The impact of consecutive X values within the scan chains is reduced by a periodic permutation of the NF-MISR inputs. As a result, no additional external control signals or test set dependent control logic is required. The benefits of the proposed method are shown by the example of an implementation on a Verigy ATE. Experiments on three industrial circuits demonstrate the effectiveness of the proposed approach in comparison to a commercial DFT solution. Y1 - 2009 UR - http://www.springerlink.com/content/100286 U6 - https://doi.org/10.1007/s10836-009-5107-5 SN - 0923-8174 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A new self-testing parity checker for ultra-reliable applications Y1 - 1996 ER - TY - JOUR A1 - Tavakoli, Hamad A1 - Alirezazadeh, Pendar A1 - Hedayatipour, Ava A1 - Nasib, A. H. Banijamali A1 - Landwehr, Niels T1 - Leaf image-based classification of some common bean cultivars using discriminative convolutional neural networks JF - Computers and electronics in agriculture : COMPAG online ; an international journal N2 - In recent years, many efforts have been made to apply image processing techniques for plant leaf identification. However, categorizing leaf images at the cultivar/variety level, because of the very low inter-class variability, is still a challenging task. In this research, we propose an automatic discriminative method based on convolutional neural networks (CNNs) for classifying 12 different cultivars of common beans that belong to three various species. We show that employing advanced loss functions, such as Additive Angular Margin Loss and Large Margin Cosine Loss, instead of the standard softmax loss function for the classification can yield better discrimination between classes and thereby mitigate the problem of low inter-class variability. The method was evaluated by classifying species (level I), cultivars from the same species (level II), and cultivars from different species (level III), based on images from the leaf foreside and backside. The results indicate that the performance of the classification algorithm on the leaf backside image dataset is superior. The maximum mean classification accuracies of 95.86, 91.37 and 86.87% were obtained at the levels I, II and III, respectively. The proposed method outperforms the previous relevant works and provides a reliable approach for plant cultivars identification. KW - Bean KW - Plant identification KW - Digital image analysis KW - VGG16 KW - Loss KW - functions Y1 - 2021 U6 - https://doi.org/10.1016/j.compag.2020.105935 SN - 0168-1699 SN - 1872-7107 VL - 181 PB - Elsevier CY - Amsterdam [u.a.] ER - TY - JOUR A1 - Gerber, Stefan A1 - Gössel, Michael T1 - Detection of permanent faults of a floating point adder by pseudoduplication Y1 - 1994 ER - TY - JOUR A1 - Bhattacharya, M. K. A1 - Dimitriev, Alexej A1 - Gössel, Michael T1 - Zero-aliasing space compresion using a single periodic output and its application to testing of embedded Y1 - 2000 ER - TY - JOUR A1 - Dimitriev, Alexej A1 - Saposhnikov, V. V. A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael T1 - Concurrent checking of sequential circuits by alternating inputs Y1 - 1999 ER - TY - JOUR A1 - Kuentzer, Felipe A. A1 - Krstić, Miloš T1 - Soft error detection and correction architecture for asynchronous bundled data designs JF - IEEE transactions on circuits and systems N2 - In this paper, an asynchronous design for soft error detection and correction in combinational and sequential circuits is presented. The proposed architecture is called Asynchronous Full Error Detection and Correction (AFEDC). A custom design flow with integrated commercial EDA tools generates the AFEDC using the asynchronous bundled-data design style. The AFEDC relies on an Error Detection Circuit (EDC) for protecting the combinational logic and fault-tolerant latches for protecting the sequential logic. The EDC can be implemented using different detection methods. For this work, two boundary variants are considered, the Full Duplication with Comparison (FDC) and the Partial Duplication with Parity Prediction (PDPP). The AFEDC architecture can handle single events and timing faults of arbitrarily long duration as well as the synchronous FEDC, but additionally can address known metastability issues of the FEDC and other similar synchronous architectures and provide a more practical solution for handling the error recovery process. Two case studies are developed, a carry look-ahead adder and a pipelined non-restoring array divider. Results show that the AFEDC provides equivalent fault coverage when compared to the FEDC while reducing area, ranging from 9.6% to 17.6%, and increasing energy efficiency, which can be up to 6.5%. KW - circuit Faults KW - latches KW - Fault tolerance KW - Fault tolerant systems KW - timing KW - clocks KW - transient analysis KW - asynchrounous design KW - soft errors KW - transient Faults KW - bundled data KW - click controller KW - self-checking KW - concurrent checking KW - DMR KW - TMR Y1 - 2020 U6 - https://doi.org/10.1109/TCSI.2020.2998911 SN - 1549-8328 SN - 1558-0806 VL - 67 IS - 12 SP - 4883 EP - 4894 PB - Institute of Electrical and Electronics Engineers CY - New York ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Otscheretnij, Vitalij A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Design of Fault-Tolerant Circuits by self-dual Duplication Y1 - 1998 ER - TY - JOUR A1 - Moschanin, Wladimir A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, Va. V. A1 - Gössel, Michael T1 - Synthesis of self-dual multi-output combinational circuits for on-line Teting Y1 - 1996 ER - TY - JOUR A1 - Seuring, Markus A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - Ein strukturelles Verfahren zur Kompaktierung von Schaltungsausgaben für online-Fehlererkennungen und Selbstests Y1 - 1998 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Gössel, Michael T1 - Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems Y1 - 1996 ER - TY - JOUR A1 - Morosov, Andrej A1 - Gössel, Michael A1 - Hartje, Hendrik T1 - Reduced area overhead of the input party for code-disjoint circuits Y1 - 1999 ER - TY - JOUR A1 - Seuring, Markus A1 - Gössel, Michael T1 - A structural method for output compaction of sequential automata implemented as circuits Y1 - 1999 ER - TY - JOUR A1 - Hlawiczka, A. A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - A linear code-preserving signature analyzer COPMISR Y1 - 1997 SN - 0-8186-7810-0 ER - TY - JOUR A1 - Bogue, Ted A1 - Gössel, Michael A1 - Jürgensen, Helmut A1 - Zorian, Yervant T1 - Built-in self-Test with an alternating output Y1 - 1998 SN - 0-8186-8359-7 ER - TY - JOUR A1 - Otscheretnij, Vitalij A1 - Gössel, Michael A1 - Saposhnikov, Vl. V. A1 - Saposhnikov, V. V. T1 - Fault-tolerant self-dual circuits with error detection by parity- and group parity prediction Y1 - 1998 ER - TY - JOUR A1 - Sogomonyan, Egor S. A1 - Singh, Adit D. A1 - Gössel, Michael T1 - A multi-mode scannable memory element for high test application efficiency and delay testing Y1 - 1998 ER - TY - JOUR A1 - Dimitriev, Alexej A1 - Saposhnikov, Vl. V. A1 - Gössel, Michael A1 - Saposhnikov, V. V. T1 - Self-dual duplication - a new method for on-line testing Y1 - 1997 ER - TY - JOUR A1 - Saposhnikov, Vl. V. A1 - Moshanin, Vl. A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Self-dual multi output combinational circuits with output data compaction Y1 - 1997 ER - TY - JOUR A1 - Gössel, Michael A1 - Sogomonyan, Egor S. T1 - On-line Test auf der Grundlage eines die Parität erhaltenden Signaturanalysators Y1 - 1998 ER - TY - JOUR A1 - Morosov, Andrej A1 - Saposhnikov, V. V. A1 - Gössel, Michael T1 - Self-Checking circuits with unidiectionally independent outputs Y1 - 1998 ER - TY - JOUR A1 - Krstić, Miloš A1 - Weidling, Stefan A1 - Petrovic, Vladimir A1 - Sogomonyan, Egor S. T1 - Enhanced architectures for soft error detection and correction in combinational and sequential circuits JF - Microelectronics Reliability N2 - In this paper two new methods for the design of fault-tolerant pipelined sequential and combinational circuits, called Error Detection and Partial Error Correction (EDPEC) and Full Error Detection and Correction (FEDC), are described. The proposed methods are based on an Error Detection Logic (EDC) in the combinational circuit part combined with fault tolerant memory elements implemented using fault tolerant master–slave flip-flops. If a transient error, due to a transient fault in the combinational circuit part is detected by the EDC, the error signal controls the latching stage of the flip-flops such that the previous correct state of the register stage is retained until the transient error disappears. The system can continue to work in its previous correct state and no additional recovery procedure (with typically reduced clock frequency) is necessary. The target applications are dataflow processing blocks, for which software-based recovery methods cannot be easily applied. The presented architectures address both single events as well as timing faults of arbitrarily long duration. An example of this architecture is developed and described, based on the carry look-ahead adder. The timing conditions are carefully investigated and simulated up to the layout level. The enhancement of the baseline architecture is demonstrated with respect to the achieved fault tolerance for the single event and timing faults. It is observed that the number of uncorrected single events is reduced by the EDPEC architecture by 2.36 times compared with previous solution. The FEDC architecture further reduces the number of uncorrected events to zero and outperforms the Triple Modular Redundancy (TMR) with respect to correction of timing faults. The power overhead of both new architectures is about 26–28% lower than the TMR. Y1 - 2016 SN - 0026-2714 VL - 56 SP - 212 EP - 220 ER - TY - JOUR A1 - Cabalar, Pedro A1 - Fandiño, Jorge A1 - Fariñas del Cerro, Luis T1 - Splitting epistemic logic programs JF - Theory and practice of logic programming / publ. for the Association for Logic Programming N2 - Epistemic logic programs constitute an extension of the stable model semantics to deal with new constructs called subjective literals. Informally speaking, a subjective literal allows checking whether some objective literal is true in all or some stable models. As it can be imagined, the associated semantics has proved to be non-trivial, since the truth of subjective literals may interfere with the set of stable models it is supposed to query. As a consequence, no clear agreement has been reached and different semantic proposals have been made in the literature. Unfortunately, comparison among these proposals has been limited to a study of their effect on individual examples, rather than identifying general properties to be checked. In this paper, we propose an extension of the well-known splitting property for logic programs to the epistemic case. We formally define when an arbitrary semantics satisfies the epistemic splitting property and examine some of the consequences that can be derived from that, including its relation to conformant planning and to epistemic constraints. Interestingly, we prove (through counterexamples) that most of the existing approaches fail to fulfill the epistemic splitting property, except the original semantics proposed by Gelfond 1991 and a recent proposal by the authors, called Founded Autoepistemic Equilibrium Logic. KW - knowledge representation and nonmonotonic reasoning KW - logic programming methodology and applications KW - theory Y1 - 2021 U6 - https://doi.org/10.1017/S1471068420000058 SN - 1471-0684 SN - 1475-3081 VL - 21 IS - 3 SP - 296 EP - 316 PB - Cambridge Univ. Press CY - Cambridge [u.a.] ER - TY - JOUR A1 - Aguado, Felicidad A1 - Cabalar, Pedro A1 - Fandiño, Jorge A1 - Pearce, David A1 - Perez, Gilberto A1 - Vidal, Concepcion T1 - Forgetting auxiliary atoms in forks JF - Artificial intelligence N2 - In this work we tackle the problem of checking strong equivalence of logic programs that may contain local auxiliary atoms, to be removed from their stable models and to be forbidden in any external context. We call this property projective strong equivalence (PSE). It has been recently proved that not any logic program containing auxiliary atoms can be reformulated, under PSE, as another logic program or formula without them – this is known as strongly persistent forgetting. In this paper, we introduce a conservative extension of Equilibrium Logic and its monotonic basis, the logic of Here-and-There, in which we deal with a new connective ‘|’ we call fork. We provide a semantic characterisation of PSE for forks and use it to show that, in this extension, it is always possible to forget auxiliary atoms under strong persistence. We further define when the obtained fork is representable as a regular formula. KW - Answer set programming KW - Non-monotonic reasoning KW - Equilibrium logic KW - Denotational semantics KW - Forgetting KW - Strong equivalence Y1 - 2019 U6 - https://doi.org/10.1016/j.artint.2019.07.005 SN - 0004-3702 SN - 1872-7921 VL - 275 SP - 575 EP - 601 PB - Elsevier CY - Amsterdam ER - TY - JOUR A1 - Aguado, Felicidad A1 - Cabalar, Pedro A1 - Fandiño, Jorge A1 - Pearce, David A1 - Perez, Gilberto A1 - Vidal-Peracho, Concepcion T1 - Revisiting Explicit Negation in Answer Set Programming JF - Theory and practice of logic programming KW - Answer set programming KW - Non-monotonic reasoning KW - Equilibrium logic KW - Explicit negation Y1 - 2019 U6 - https://doi.org/10.1017/S1471068419000267 SN - 1471-0684 SN - 1475-3081 VL - 19 IS - 5-6 SP - 908 EP - 924 PB - Cambridge Univ. Press CY - New York ER - TY - JOUR A1 - Schick, Daniel A1 - Bojahr, Andre A1 - Herzog, Marc A1 - Shayduk, Roman A1 - von Korff Schmising, Clemens A1 - Bargheer, Matias T1 - Udkm1Dsim-A simulation toolkit for 1D ultrafast dynamics in condensed matter JF - Computer physics communications : an international journal devoted to computational physics and computer programs in physics N2 - The UDKM1DSIM toolbox is a collection of MATLAB (MathWorks Inc.) classes and routines to simulate the structural dynamics and the according X-ray diffraction response in one-dimensional crystalline sample structures upon an arbitrary time-dependent external stimulus, e.g. an ultrashort laser pulse. The toolbox provides the capabilities to define arbitrary layered structures on the atomic level including a rich database of corresponding element-specific physical properties. The excitation of ultrafast dynamics is represented by an N-temperature model which is commonly applied for ultrafast optical excitations. Structural dynamics due to thermal stress are calculated by a linear-chain model of masses and springs. The resulting X-ray diffraction response is computed by dynamical X-ray theory. The UDKM1DSIM toolbox is highly modular and allows for introducing user-defined results at any step in the simulation procedure. Program summary Program title: udkm1Dsim Catalogue identifier: AERH_v1_0 Program summary URL: http://cpc.cs.qub.ac.uk/summaries/AERH_v1_0.html Licensing provisions: BSD No. of lines in distributed program, including test data, etc.: 130221 No. of bytes in distributed program, including test data, etc.: 2746036 Distribution format: tar.gz Programming language: Matlab (MathWorks Inc.). Computer: PC/Workstation. Operating system: Running Matlab installation required (tested on MS Win XP -7, Ubuntu Linux 11.04-13.04). Has the code been vectorized or parallelized?: Parallelization for dynamical XRD computations. Number of processors used: 1-12 for Matlab Parallel Computing Toolbox; 1 - infinity for Matlab Distributed Computing Toolbox External routines: Optional: Matlab Parallel Computing Toolbox, Matlab Distributed Computing Toolbox Required (included in the package): mtimesx Fast Matrix Multiply for Matlab by James Tursa, xml io tools by Jaroslaw Tuszynski, textprogressbar by Paul Proteus Nature of problem: Simulate the lattice dynamics of 1D crystalline sample structures due to an ultrafast excitation including thermal transport and compute the corresponding transient X-ray diffraction pattern. Solution method: Restrictions: The program is restricted to 1D sample structures and is further limited to longitudinal acoustic phonon modes and symmetrical X-ray diffraction geometries. Unusual features: The program is highly modular and allows the inclusion of user-defined inputs at any time of the simulation procedure. Running time: The running time is highly dependent on the number of unit cells in the sample structure and other simulation parameters such as time span or angular grid for X-ray diffraction computations. However, the example files are computed in approx. 1-5 min each on a 8 Core Processor with 16 GB RAM available. KW - Ultrafast dynamics KW - Heat diffusion KW - N-temperature model KW - Coherent phonons KW - Incoherent phonons KW - Thermoelasticity KW - Dynamical X-ray theory Y1 - 2014 U6 - https://doi.org/10.1016/j.cpc.2013.10.009 SN - 0010-4655 SN - 1879-2944 VL - 185 IS - 2 SP - 651 EP - 660 PB - Elsevier CY - Amsterdam ER - TY - JOUR A1 - Dimopoulos, Yannis A1 - Gebser, Martin A1 - Lühne, Patrick A1 - Romero Davila, Javier A1 - Schaub, Torsten T1 - plasp 3 BT - Towards Effective ASP Planning JF - Theory and practice of logic programming N2 - We describe the new version of the Planning Domain Definition Language (PDDL)-to-Answer Set Programming (ASP) translator plasp. First, it widens the range of accepted PDDL features. Second, it contains novel planning encodings, some inspired by Satisfiability Testing (SAT) planning and others exploiting ASP features such as well-foundedness. All of them are designed for handling multivalued fluents in order to capture both PDDL as well as SAS planning formats. Third, enabled by multishot ASP solving, it offers advanced planning algorithms also borrowed from SAT planning. As a result, plasp provides us with an ASP-based framework for studying a variety of planning techniques in a uniform setting. Finally, we demonstrate in an empirical analysis that these techniques have a significant impact on the performance of ASP planning. KW - knowledge representation and nonmonotonic reasoning KW - technical notes and rapid communications KW - answer set programming KW - automated planning KW - action and change Y1 - 2019 U6 - https://doi.org/10.1017/S1471068418000583 SN - 1471-0684 SN - 1475-3081 VL - 19 IS - 3 SP - 477 EP - 504 PB - Cambridge Univ. Press CY - New York ER - TY - JOUR A1 - Kaminski, Roland A1 - Schaub, Torsten A1 - Siegel, Anne A1 - Videla, Santiago T1 - Minimal intervention strategies in logical signaling networks with ASP JF - Theory and practice of logic programming N2 - Proposing relevant perturbations to biological signaling networks is central to many problems in biology and medicine because it allows for enabling or disabling certain biological outcomes. In contrast to quantitative methods that permit fine-grained (kinetic) analysis, qualitative approaches allow for addressing large-scale networks. This is accomplished by more abstract representations such as logical networks. We elaborate upon such a qualitative approach aiming at the computation of minimal interventions in logical signaling networks relying on Kleene's three-valued logic and fixpoint semantics. We address this problem within answer set programming and show that it greatly outperforms previous work using dedicated algorithms. Y1 - 2013 U6 - https://doi.org/10.1017/S1471068413000422 SN - 1471-0684 VL - 13 SP - 675 EP - 690 PB - Cambridge Univ. Press CY - New York ER - TY - JOUR A1 - Schaub, Torsten A1 - Brüning, Stefan A1 - Nicolas, Pascal T1 - XRay : a prolog technology theorem prover for default reasoning: a system description Y1 - 1996 SN - 3-540-61511-3 ER - TY - JOUR A1 - Besnard, Philippe A1 - Schaub, Torsten T1 - A simple signed system for paraconsistent reasoning Y1 - 1996 SN - 3-540-61630-6 ER - TY - JOUR A1 - Gebser, Martin A1 - Schaub, Torsten A1 - Tompits, Hans A1 - Woltran, Stefan T1 - Alternative characterizations for program equivalence under aswer-set semantics : a preliminary report Y1 - 2007 ER - TY - JOUR A1 - Gebser, Martin A1 - Obermeier, Philipp A1 - Schaub, Torsten A1 - Ratsch-Heitmann, Michel A1 - Runge, Mario T1 - Routing driverless transport vehicles in car assembly with answer set programming JF - Theory and practice of logic programming N2 - Automated storage and retrieval systems are principal components of modern production and warehouse facilities. In particular, automated guided vehicles nowadays substitute human-operated pallet trucks in transporting production materials between storage locations and assembly stations. While low-level control systems take care of navigating such driverless vehicles along programmed routes and avoid collisions even under unforeseen circumstances, in the common case of multiple vehicles sharing the same operation area, the problem remains how to set up routes such that a collection of transport tasks is accomplished most effectively. We address this prevalent problem in the context of car assembly at Mercedes-Benz Ludwigsfelde GmbH, a large-scale producer of commercial vehicles, where routes for automated guided vehicles used in the production process have traditionally been hand-coded by human engineers. Such adhoc methods may suffice as long as a running production process remains in place, while any change in the factory layout or production targets necessitates tedious manual reconfiguration, not to mention the missing portability between different production plants. Unlike this, we propose a declarative approach based on Answer Set Programming to optimize the routes taken by automated guided vehicles for accomplishing transport tasks. The advantages include a transparent and executable problem formalization, provable optimality of routes relative to objective criteria, as well as elaboration tolerance towards particular factory layouts and production targets. Moreover, we demonstrate that our approach is efficient enough to deal with the transport tasks evolving in realistic production processes at the car factory of Mercedes-Benz Ludwigsfelde GmbH. KW - automated guided vehicle routing KW - car assembly operations KW - answer set programming Y1 - 2018 U6 - https://doi.org/10.1017/S1471068418000182 SN - 1471-0684 SN - 1475-3081 VL - 18 IS - 3-4 SP - 520 EP - 534 PB - Cambridge Univ. Press CY - New York ER - TY - JOUR A1 - Lindauer, Marius A1 - Hoos, Holger A1 - Leyton-Brown, Kevin A1 - Schaub, Torsten T1 - Automatic construction of parallel portfolios via algorithm configuration JF - Artificial intelligence N2 - Since 2004, increases in computational power described by Moore's law have substantially been realized in the form of additional cores rather than through faster clock speeds. To make effective use of modern hardware when solving hard computational problems, it is therefore necessary to employ parallel solution strategies. In this work, we demonstrate how effective parallel solvers for propositional satisfiability (SAT), one of the most widely studied NP-complete problems, can be produced automatically from any existing sequential, highly parametric SAT solver. Our Automatic Construction of Parallel Portfolios (ACPP) approach uses an automatic algorithm configuration procedure to identify a set of configurations that perform well when executed in parallel. Applied to two prominent SAT solvers, Lingeling and clasp, our ACPP procedure identified 8-core solvers that significantly outperformed their sequential counterparts on a diverse set of instances from the application and hard combinatorial category of the 2012 SAT Challenge. We further extended our ACPP approach to produce parallel portfolio solvers consisting of several different solvers by combining their configuration spaces. Applied to the component solvers of the 2012 SAT Challenge gold medal winning SAT Solver pfolioUZK, our ACPP procedures produced a significantly better-performing parallel SAT solver. KW - Algorithm configuration KW - Parallel SAT solving KW - Algorithm portfolios KW - Programming by optimization KW - Automated parallelization Y1 - 2016 U6 - https://doi.org/10.1016/j.artint.2016.05.004 SN - 0004-3702 SN - 1872-7921 VL - 244 SP - 272 EP - 290 PB - Elsevier CY - Amsterdam ER - TY - JOUR A1 - Gebser, Martin A1 - Kaufmann, Benjamin A1 - Schaub, Torsten T1 - Conflict-driven answer set solving: From theory to practice JF - Artificial intelligence N2 - We introduce an approach to computing answer sets of logic programs, based on concepts successfully applied in Satisfiability (SAT) checking. The idea is to view inferences in Answer Set Programming (ASP) as unit propagation on nogoods. This provides us with a uniform constraint-based framework capturing diverse inferences encountered in ASP solving. Moreover, our approach allows us to apply advanced solving techniques from the area of SAT. As a result, we present the first full-fledged algorithmic framework for native conflict-driven ASP solving. Our approach is implemented in the ASP solver clasp that has demonstrated its competitiveness and versatility by winning first places at various solver contests. KW - Answer set programming KW - Logic programming KW - Nonmonotonic reasoning Y1 - 2012 U6 - https://doi.org/10.1016/j.artint.2012.04.001 SN - 0004-3702 VL - 187 IS - 8 SP - 52 EP - 89 PB - Elsevier CY - Amsterdam ER - TY - JOUR A1 - Besnard, Philippe A1 - Schaub, Torsten A1 - Tompits, Hans A1 - Woltran, Stefan T1 - Paraconsistent reasoning via quantified boolean formulas Y1 - 2002 SN - 3-540-44190-5 ER - TY - JOUR A1 - Gebser, Martin A1 - Kaufmann, Benjamin A1 - Neumann, André A1 - Schaub, Torsten T1 - Clasp : a conflict-driven answer set solver Y1 - 2007 SN - 978-3-540- 72199-4 ER - TY - JOUR A1 - Brain, Martin A1 - Faber, Wolfgang A1 - Maratea, Marco A1 - Polleres, Axel A1 - Schaub, Torsten A1 - Schindlauer, Roman T1 - What should an ASP solver output? : a multiple position paper Y1 - 2007 ER - TY - JOUR A1 - Thielscher, Michael A1 - Schaub, Torsten T1 - Default reasoning by deductive planning Y1 - 1995 ER - TY - JOUR A1 - Banbara, Mutsunori A1 - Soh, Takehide A1 - Tamura, Naoyuki A1 - Inoue, Katsumi A1 - Schaub, Torsten T1 - Answer set programming as a modeling language for course timetabling JF - Theory and practice of logic programming N2 - The course timetabling problem can be generally defined as the task of assigning a number of lectures to a limited set of timeslots and rooms, subject to a given set of hard and soft constraints. The modeling language for course timetabling is required to be expressive enough to specify a wide variety of soft constraints and objective functions. Furthermore, the resulting encoding is required to be extensible for capturing new constraints and for switching them between hard and soft, and to be flexible enough to deal with different formulations. In this paper, we propose to make effective use of ASP as a modeling language for course timetabling. We show that our ASP-based approach can naturally satisfy the above requirements, through an ASP encoding of the curriculum-based course timetabling problem proposed in the third track of the second international timetabling competition (ITC-2007). Our encoding is compact and human-readable, since each constraint is individually expressed by either one or two rules. Each hard constraint is expressed by using integrity constraints and aggregates of ASP. Each soft constraint S is expressed by rules in which the head is the form of penalty (S, V, C), and a violation V and its penalty cost C are detected and calculated respectively in the body. We carried out experiments on four different benchmark sets with five different formulations. We succeeded either in improving the bounds or producing the same bounds for many combinations of problem instances and formulations, compared with the previous best known bounds. KW - answer set programming KW - educational timetabling KW - course timetabling Y1 - 2013 U6 - https://doi.org/10.1017/S1471068413000495 SN - 1471-0684 VL - 13 IS - 2 SP - 783 EP - 798 PB - Cambridge Univ. Press CY - New York ER - TY - JOUR A1 - Gebser, Martin A1 - Sabuncu, Orkunt A1 - Schaub, Torsten T1 - An incremental answer set programming based system for finite model computation JF - AI communications : AICOM ; the European journal on artificial intelligence N2 - We address the problem of Finite Model Computation (FMC) of first-order theories and show that FMC can efficiently and transparently be solved by taking advantage of a recent extension of Answer Set Programming (ASP), called incremental Answer Set Programming (iASP). The idea is to use the incremental parameter in iASP programs to account for the domain size of a model. The FMC problem is then successively addressed for increasing domain sizes until an answer set, representing a finite model of the original first-order theory, is found. We implemented a system based on the iASP solver iClingo and demonstrate its competitiveness by showing that it slightly outperforms the winner of the FNT division of CADE's 2009 Automated Theorem Proving (ATP) competition on the respective benchmark collection. KW - Incremental answer set programming KW - finite model computation Y1 - 2011 U6 - https://doi.org/10.3233/AIC-2011-0496 SN - 0921-7126 VL - 24 IS - 2 SP - 195 EP - 212 PB - IOS Press CY - Amsterdam ER - TY - JOUR A1 - Delgrande, James Patrick A1 - Schaub, Torsten A1 - Tompits, Hans T1 - A Preference-Based Framework for Updating logic Programs : preliminary reports Y1 - 2006 UR - http://www.easychair.org/FLoC-06/PREFS-preproceedings.pdf ER - TY - JOUR A1 - Linke, Thomas A1 - Schaub, Torsten T1 - An approach to query-answering in Reiter's default logic and the underlying existence of extensions problem. Y1 - 1998 SN - 3-540-65141-1 ER - TY - JOUR A1 - Roessner, Ute A1 - Luedemann, A. A1 - Brust, D. A1 - Fiehn, Oliver A1 - Linke, Thomas A1 - Willmitzer, Lothar A1 - Fernie, Alisdair T1 - Metabolic profiling allows comprehensive phenotyping of genetically or environmentally modified plant systems Y1 - 2001 SN - 1040-4651 ER - TY - JOUR A1 - Banbara, Mutsunori A1 - Inoue, Katsumi A1 - Kaufmann, Benjamin A1 - Okimoto, Tenda A1 - Schaub, Torsten A1 - Soh, Takehide A1 - Tamura, Naoyuki A1 - Wanko, Philipp T1 - teaspoon BT - solving the curriculum-based course timetabling problems with answer set programming JF - Annals of operation research N2 - Answer Set Programming (ASP) is an approach to declarative problem solving, combining a rich yet simple modeling language with high performance solving capacities. We here develop an ASP-based approach to curriculum-based course timetabling (CB-CTT), one of the most widely studied course timetabling problems. The resulting teaspoon system reads a CB-CTT instance of a standard input format and converts it into a set of ASP facts. In turn, these facts are combined with a first-order encoding for CB-CTT solving, which can subsequently be solved by any off-the-shelf ASP systems. We establish the competitiveness of our approach by empirically contrasting it to the best known bounds obtained so far via dedicated implementations. Furthermore, we extend the teaspoon system to multi-objective course timetabling and consider minimal perturbation problems. KW - Educational timetabling KW - Course timetabling KW - Answer set programming KW - Multi-objective optimization KW - Minimal perturbation problems Y1 - 2018 U6 - https://doi.org/10.1007/s10479-018-2757-7 SN - 0254-5330 SN - 1572-9338 VL - 275 IS - 1 SP - 3 EP - 37 PB - Springer CY - Dordrecht ER - TY - JOUR A1 - Frioux, Clémence A1 - Schaub, Torsten A1 - Schellhorn, Sebastian A1 - Siegel, Anne A1 - Wanko, Philipp T1 - Hybrid metabolic network completion JF - Theory and practice of logic programming N2 - Metabolic networks play a crucial role in biology since they capture all chemical reactions in an organism. While there are networks of high quality for many model organisms, networks for less studied organisms are often of poor quality and suffer from incompleteness. To this end, we introduced in previous work an answer set programming (ASP)-based approach to metabolic network completion. Although this qualitative approach allows for restoring moderately degraded networks, it fails to restore highly degraded ones. This is because it ignores quantitative constraints capturing reaction rates. To address this problem, we propose a hybrid approach to metabolic network completion that integrates our qualitative ASP approach with quantitative means for capturing reaction rates. We begin by formally reconciling existing stoichiometric and topological approaches to network completion in a unified formalism. With it, we develop a hybrid ASP encoding and rely upon the theory reasoning capacities of the ASP system dingo for solving the resulting logic program with linear constraints over reals. We empirically evaluate our approach by means of the metabolic network of Escherichia coli. Our analysis shows that our novel approach yields greatly superior results than obtainable from purely qualitative or quantitative approaches. KW - answer set programming KW - metabolic network KW - gap-filling KW - linear programming KW - hybrid solving KW - bioinformatics Y1 - 2018 U6 - https://doi.org/10.1017/S1471068418000455 SN - 1471-0684 SN - 1475-3081 VL - 19 IS - 1 SP - 83 EP - 108 PB - Cambridge University Press CY - New York ER - TY - JOUR A1 - Gebser, Martin A1 - Kaminski, Roland A1 - Kaufmann, Benjamin A1 - Lühne, Patrick A1 - Obermeier, Philipp A1 - Ostrowski, Max A1 - Romero Davila, Javier A1 - Schaub, Torsten A1 - Schellhorn, Sebastian A1 - Wanko, Philipp T1 - The Potsdam Answer Set Solving Collection 5.0 JF - Künstliche Intelligenz N2 - The Potsdam answer set solving collection, or Potassco for short, bundles various tools implementing and/or applying answer set programming. The article at hand succeeds an earlier description of the Potassco project published in Gebser et al. (AI Commun 24(2):107-124, 2011). Hence, we concentrate in what follows on the major features of the most recent, fifth generation of the ASP system clingo and highlight some recent resulting application systems. Y1 - 2018 U6 - https://doi.org/10.1007/s13218-018-0528-x SN - 0933-1875 SN - 1610-1987 VL - 32 IS - 2-3 SP - 181 EP - 182 PB - Springer CY - Heidelberg ER - TY - JOUR A1 - Haubelt, Christian A1 - Neubauer, Kai A1 - Schaub, Torsten A1 - Wanko, Philipp T1 - Design space exploration with answer set programming JF - Künstliche Intelligenz N2 - The aim of our project design space exploration with answer set programming is to develop a general framework based on Answer Set Programming (ASP) that finds valid solutions to the system design problem and simultaneously performs Design Space Exploration (DSE) to find the most favorable alternatives. We leverage recent developments in ASP solving that allow for tight integration of background theories to create a holistic framework for effective DSE. Y1 - 2018 U6 - https://doi.org/10.1007/s13218-018-0530-3 SN - 0933-1875 SN - 1610-1987 VL - 32 IS - 2-3 SP - 205 EP - 206 PB - Springer CY - Heidelberg ER - TY - JOUR A1 - Andjelkovic, Marko A1 - Marjanovic, Milos A1 - Chen, Junchao A1 - Ilic, Stefan A1 - Ristic, Goran A1 - Krstic, Milos T1 - PS-BBICS: Pulse stretching bulk built-in current sensor for on-chip measurement of single event transients JF - Microelectronics reliability N2 - The bulk built-in current sensor (BBICS) is a cost-effective solution for detection of energetic particle strikes in integrated circuits. With an appropriate number of BBICSs distributed across the chip, the soft error locations can be identified, and the dynamic fault-tolerant mechanisms can be activated locally to correct the soft errors in the affected logic. In this work, we introduce a pulse stretching BBICS (PS-BBICS) constructed by connecting a standard BBICS and a custom-designed pulse stretching cell. The aim of PS-BBICS is to enable the on-chip measurement of the single event transient (SET) pulse width, allowing to detect the linear energy transfer (LET) of incident particles, and thus assess more accurately the radiation conditions. Based on Spectre simula-tions, we have shown that for the LET from 1 to 100 MeV cm2 mg -1, the SET pulse width detected by PS-BBICS varies by 620-800 ps. The threshold LET of PS-BBICS increases linearly with the number of monitored inverters, and it is around 1.7 MeV cm2 mg- 1 for ten monitored inverters. On the other hand, the SET pulse width is in-dependent of the number of monitored inverters for LET > 4 MeV cm2 mg -1. It was shown that supply voltage, temperature and process variations have strong impact on the response of PS-BBICS. KW - bulk built-in current sensor KW - single event transients KW - soft errors Y1 - 2022 U6 - https://doi.org/10.1016/j.microrel.2022.114726 SN - 0026-2714 SN - 1872-941X VL - 138 PB - Elsevier CY - Oxford ER -