TY - JOUR A1 - Müller, Matthias M. A1 - Haakh, Harald R. A1 - Calarco, Tommaso A1 - Koch, Christiane P. A1 - Henkel, Carsten T1 - Prospects for fast Rydberg gates on an atom chip JF - Quantum information processing N2 - Atom chips are a promising candidate for a scalable architecture for quantum information processing provided a universal set of gates can be implemented with high fidelity. The difficult part in achieving universality is the entangling two-qubit gate. We consider a Rydberg phase gate for two atoms trapped on a chip and employ optimal control theory to find the shortest gate that still yields a reasonable gate error. Our parameters correspond to a situation where the Rydberg blockade regime is not yet reached. We discuss the role of spontaneous emission and the effect of noise from the chip surface on the atoms in the Rydberg state. KW - Optimal control KW - Phase gate KW - Rydberg atoms KW - Cavity quantum electrodynamics Y1 - 2011 U6 - https://doi.org/10.1007/s11128-011-0296-0 SN - 1570-0755 VL - 10 IS - 6 SP - 771 EP - 792 PB - Springer CY - New York ER - TY - JOUR A1 - Zoller, Peter A1 - Beth, Thomas A1 - Binosi, D. A1 - Blatt, Rainer A1 - Briegel, Hans J. A1 - Bruss, D. A1 - Calarco, Tommaso A1 - Cirac, Juan Ignacio A1 - Deutsch, David A1 - Eisert, Jens A1 - Ekert, Artur A1 - Fabre, Claude A1 - Gisin, Nicolas A1 - Grangiere, P. A1 - Grassl, Markus A1 - Haroche, Serge A1 - Imamoglu, Atac A1 - Karlson, A. A1 - Kempe, Julia A1 - Kouwenhoven, Leo P. A1 - Kröll, S. A1 - Leuchs, Gerd A1 - Lewenstein, Maciej A1 - Loss, Daniel A1 - Lütkenhaus, Norbert A1 - Massar, Serge A1 - Mooij, J. E. A1 - Plenio, Martin Bodo A1 - Polzik, Eugene A1 - Popescu, Sandu A1 - Rempe, Gerhard A1 - Sergienko, Alexander A1 - Suter, David A1 - Twamley, John A1 - Wendin, Göran A1 - Werner, Reinhard F. A1 - Winter, Andreas A1 - Wrachtrup, Jörg A1 - Zeilinger, Anton T1 - Quantum information processing and communication : Strategic report on current status, visions and goals for research in Europe N2 - We present an excerpt of the document "Quantum Information Processing and Communication: Strategic report on current status, visions and goals for research in Europe", which has been recently published in electronic form at the website of FET (the Future and Emerging Technologies Unit of the Directorate General Information Society of the European Commission, http://www.cordis.lu/ist/fet/qipc-sr.htm). This document has been elaborated, following a former suggestion by FET, by a committee of QIPC scientists to provide input towards the European Commission for the preparation of the Seventh Framework Program. Besides being a document addressed to policy makers and funding agencies (both at the European and national level), the document contains a detailed scientific assessment of the state-of-the-art, main research goals, challenges, strengths, weaknesses, visions and perspectives of all the most relevant QIPC sub-fields, that we report here Y1 - 2005 SN - 1434-6060 ER - TY - JOUR A1 - Charron, Eric A1 - Cirone, M. A. A1 - Negretti, Antonio A1 - Schmiedmayer, Jörg A1 - Calarco, Tommaso T1 - Theoretical analysis of a realistic atom-chip quantum gate N2 - We present a detailed, realistic analysis of the implementation of a proposal for a quantum phase gate based on atomic vibrational states, specializing it to neutral rubidium atoms on atom chips. We show how to create a double-well potential with static currents on the atom chips, using for all relevant parameters values that are achieved with present technology. The potential barrier between the two wells can be modified by varying the currents in order to realize a quantum phase gate for qubit states encoded in the atomic external degree of freedom. The gate performance is analyzed through numerical simulations; the operation time is similar to 10 ms with a performance fidelity above 99.9%. For storage of the state between the operations the qubit state can be transferred efficiently via Raman transitions to two hyperfine states, where its decoherence is strongly inhibited. In addition we discuss the limits imposed by the proximity of the surface to the gate fidelity. Y1 - 2006 UR - http://pra.aps.org/ SN - 1050-2947 ER -