@phdthesis{Hecher2021,
  author    = {Hecher, Markus},
  title     = {Advanced tools and methods for treewidth-based problem solving},
  doi       = {10.25932/publishup-51251},
  url       = {http://nbn-resolving.de/urn:nbn:de:kobv:517-opus4-512519},
  school      = {Universit{\"a}t Potsdam},
  pages     = {xv, 184},
  year      = {2021},
  abstract  = {In the last decades, there was a notable progress in solving the well-known Boolean satisfiability (Sat) problem, which can be witnessed by powerful Sat solvers. One of the reasons why these solvers are so fast are structural properties of instances that are utilized by the solver's interna. This thesis deals with the well-studied structural property treewidth, which measures the closeness of an instance to being a tree. In fact, there are many problems parameterized by treewidth that are solvable in polynomial time in the instance size when parameterized by treewidth. In this work, we study advanced treewidth-based methods and tools for problems in knowledge representation and reasoning (KR). Thereby, we provide means to establish precise runtime results (upper bounds) for canonical problems relevant to KR. Then, we present a new type of problem reduction, which we call decomposition-guided (DG) that allows us to precisely monitor the treewidth when reducing from one problem to another problem. This new reduction type will be the basis for a long-open lower bound result for quantified Boolean formulas and allows us to design a new methodology for establishing runtime lower bounds for problems parameterized by treewidth. Finally, despite these lower bounds, we provide an efficient implementation of algorithms that adhere to treewidth. Our approach finds suitable abstractions of instances, which are subsequently refined in a recursive fashion, and it uses Sat solvers for solving subproblems. It turns out that our resulting solver is quite competitive for two canonical counting problems related to Sat.},
  language  = {en}
}
@book{PlattnerLeukert2015,
  author    = {Plattner, Hasso and Leukert, Bernd},
  title     = {The in-memory revolution},
  publisher = {Springer},
  address   = {Cham},
  isbn      = {978-3-319-16672-8},
  pages     = {275},
  year      = {2015},
  abstract  = {This book describes the next generation of business applications enabled by SAP's in-memory database, SAP HANA. In particular, the authors show the substantial changes introduced in S4/HANA by switching to SAP HANA. Using numerous examples and use cases from the authors' wealth of real-world experience, it illustrates the quantum leap in performance made possible by the new technology. The book is written by two of the most prominent actors in the area of business application systems: Hasso Plattner, co-founder of SAP and inaugurator of the Hasso Plattner Institute at the University of Potsdam, and Bernd Leukert, member of the Executive Board and the Global Managing Board of SAP. This clearly structured, highly illustrated book takes an exciting new technology and presents the practicality and success of first mover applications.},
  language  = {en}
}
@phdthesis{Boehne2019,
  author    = {B{\"o}hne, Sebastian},
  title     = {Different degrees of formality},
  doi       = {10.25932/publishup-42379},
  url       = {http://nbn-resolving.de/urn:nbn:de:kobv:517-opus4-423795},
  school      = {Universit{\"a}t Potsdam},
  pages     = {VI, 167},
  year      = {2019},
  abstract  = {In this thesis we introduce the concept of the degree of formality. It is directed against a dualistic point of view, which only distinguishes between formal and informal proofs. This dualistic attitude does not respect the differences between the argumentations classified as informal and it is unproductive because the individual potential of the respective argumentation styles cannot be appreciated and remains untapped. This thesis has two parts. In the first of them we analyse the concept of the degree of formality (including a discussion about the respective benefits for each degree) while in the second we demonstrate its usefulness in three case studies. In the first case study we will repair Haskell B. Curry's view of mathematics, which incidentally is of great importance in the first part of this thesis, in light of the different degrees of formality. In the second case study we delineate how awareness of the different degrees of formality can be used to help students to learn how to prove. Third, we will show how the advantages of proofs of different degrees of formality can be combined by the development of so called tactics having a medium degree of formality. Together the three case studies show that the degrees of formality provide a convincing solution to the problem of untapped potential.},
  language  = {en}
}
@article{AndjelkovicSimevskiChenetal.2022,
  author    = {Andjelkovic, Marko and Simevski, Aleksandar and Chen, Junchao and Schrape, Oliver and Stamenkovic, Zoran and Krstić, Miloš and Ilic, Stefan and Ristic, Goran and Jaksic, Aleksandar and Vasovic, Nikola and Duane, Russell and Palma, Alberto J. and Lallena, Antonio M. and Carvajal, Miguel A.},
  title     = {A design concept for radiation hardened RADFET readout system for space applications},
  series = {Microprocessors and microsystems},
  volume    = {90},
  journal   = {Microprocessors and microsystems},
  publisher = {Elsevier},
  address   = {Amsterdam},
  issn      = {0141-9331},
  doi       = {10.1016/j.micpro.2022.104486},
  pages     = {18},
  year      = {2022},
  abstract  = {Instruments for measuring the absorbed dose and dose rate under radiation exposure, known as radiation dosimeters, are indispensable in space missions. They are composed of radiation sensors that generate current or voltage response when exposed to ionizing radiation, and processing electronics for computing the absorbed dose and dose rate. Among a wide range of existing radiation sensors, the Radiation Sensitive Field Effect Transistors (RADFETs) have unique advantages for absorbed dose measurement, and a proven record of successful exploitation in space missions. It has been shown that the RADFETs may be also used for the dose rate monitoring. In that regard, we propose a unique design concept that supports the simultaneous operation of a single RADFET as absorbed dose and dose rate monitor. This enables to reduce the cost of implementation, since the need for other types of radiation sensors can be minimized or eliminated. For processing the RADFET's response we propose a readout system composed of analog signal conditioner (ASC) and a self-adaptive multiprocessing system-on-chip (MPSoC). The soft error rate of MPSoC is monitored in real time with embedded sensors, allowing the autonomous switching between three operating modes (high-performance, de-stress and fault-tolerant), according to the application requirements and radiation conditions.},
  language  = {en}
}
@phdthesis{Seuring2000,
  author    = {Seuring, Markus},
  title     = {Output space compaction for testing and concurrent checking},
  url       = {http://nbn-resolving.de/urn:nbn:de:kobv:517-0000165},
  school      = {Universit{\"a}t Potsdam},
  year      = {2000},
  abstract  = {In der Dissertation werden neue Entwurfsmethoden f{\"u}r Kompaktoren f{\"u}r die Ausg{\"a}nge von digitalen Schaltungen beschrieben, die die Anzahl der zu testenden Ausg{\"a}nge drastisch verkleinern und dabei die Testbarkeit der Schaltungen nur wenig oder gar nicht verschlechtern. Der erste Teil der Arbeit behandelt f{\"u}r kombinatorische Schaltungen Methoden, die die Struktur der Schaltungen beim Entwurf der Kompaktoren ber{\"u}cksichtigen. Verschiedene Algorithmen zur Analyse von Schaltungsstrukturen werden zum ersten Mal vorgestellt und untersucht. Die Komplexit{\"a}t der vorgestellten Verfahren zur Erzeugung von Kompaktoren ist linear bez{\"u}glich der Anzahl der Gatter in der Schaltung und ist damit auf sehr große Schaltungen anwendbar. Im zweiten Teil wird erstmals ein solches Verfahren f{\"u}r sequentielle Schaltkreise beschrieben. Dieses Verfahren baut im wesentlichen auf das erste auf. Der dritte Teil beschreibt eine Entwurfsmethode, die keine Informationen {\"u}ber die interne Struktur der Schaltung oder {\"u}ber das zugrundeliegende Fehlermodell ben{\"o}tigt. Der Entwurf basiert alleine auf einem vorgegebenen Satz von Testvektoren und die dazugeh{\"o}renden Testantworten der fehlerfreien Schaltung. Ein nach diesem Verfahren erzeugter Kompaktor maskiert keinen der Fehler, die durch das Testen mit den vorgegebenen Vektoren an den Ausg{\"a}ngen der Schaltung beobachtbar sind.},
  language  = {en}
}