@article{HartjeSogomonyanGoessel1997, author = {Hartje, Hendrik and Sogomonyan, Egor S. and G{\"o}ssel, Michael}, title = {Code disjoint circuits for partity codes}, year = {1997}, language = {en} } @article{HlawiczkaGoesselSogomonyan1997, author = {Hlawiczka, A. and G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A linear code-preserving signature analyzer COPMISR}, isbn = {0-8186-7810-0}, year = {1997}, language = {en} } @article{DimitrievSaposhnikovGoesseletal.1997, author = {Dimitriev, Alexej and Saposhnikov, Vl. V. and G{\"o}ssel, Michael and Saposhnikov, V. V.}, title = {Self-dual duplication - a new method for on-line testing}, year = {1997}, language = {en} } @article{SaposhnikovMoshaninSaposhnikovetal.1997, author = {Saposhnikov, Vl. V. and Moshanin, Vl. and Saposhnikov, V. V. and G{\"o}ssel, Michael}, title = {Self-dual multi output combinational circuits with output data compaction}, year = {1997}, language = {en} } @book{SeuringGoesselSogomonyan1997, author = {Seuring, Markus and G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A structural approach for space compaction for concurrent checking and BIST}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {1997, 01}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ. Potsdam}, address = {Potsdam [u.a.]}, issn = {0946-7580}, pages = {19 S. : Ill.}, year = {1997}, language = {en} } @article{SchaubBruening1996, author = {Schaub, Torsten H. and Br{\"u}ning, Stefan}, title = {Prolog technology for default reasoning}, isbn = {0-471-96809-9}, year = {1996}, language = {en} } @article{BesnardSchaub1996, author = {Besnard, Philippe and Schaub, Torsten H.}, title = {A simple signed system for paraconsistent reasoning}, isbn = {3-540-61630-6}, year = {1996}, language = {en} } @article{SchaubThielscher1996, author = {Schaub, Torsten H. and Thielscher, Michael}, title = {Skeptical query-answering in constrained default logic}, isbn = {3-540-61313-7}, year = {1996}, language = {en} } @article{SchaubBrueningNicolas1996, author = {Schaub, Torsten H. and Br{\"u}ning, Stefan and Nicolas, Pascal}, title = {XRay : a prolog technology theorem prover for default reasoning: a system description}, isbn = {3-540-61511-3}, year = {1996}, language = {en} } @article{LinkeSchaub1996, author = {Linke, Thomas and Schaub, Torsten H.}, title = {Putting default logics in perspective}, isbn = {3-540-61708-6}, year = {1996}, language = {en} } @article{BrueningSchaub1996, author = {Br{\"u}ning, Stefan and Schaub, Torsten H.}, title = {A model-based approach to consistency-checking}, isbn = {3-540-61286-6}, year = {1996}, language = {en} } @article{HornKoutzevlovRaetschetal.1996, author = {Horn, Erika and Koutzevlov, Atanas and R{\"a}tsch, Gunnar and Schubert, Wolfgang and Tschapek, Alexej}, title = {Software system specification}, series = {HGG-Dokument}, volume = {UPHGG.010.4}, journal = {HGG-Dokument}, publisher = {Univ.}, address = {Potsdam}, year = {1996}, language = {en} } @article{SchroederPreikschatGarnatzHaacketal.1996, author = {Schr{\"o}der-Preikschat, Wolfgang and Garnatz, Thomas and Haack, Ute and Sander, Michael}, title = {Experience made with the design and development of a message-passing kernel for a dual-processor-node parallel computer}, year = {1996}, language = {en} } @article{HornNeuhausRaetschetal.1996, author = {Horn, Erika and Neuhaus, Alexander and R{\"a}tsch, Gunnar and Schubert, Wolfgang and Tschapek, Alexej}, title = {Software development plan}, series = {HGG-Dokument}, volume = {UPHGG.002.4}, journal = {HGG-Dokument}, publisher = {Univ.}, address = {Potsdam}, year = {1996}, language = {en} } @phdthesis{Kunz1996, author = {Kunz, Wolfgang}, title = {Testing techniques in logic synthesis}, pages = {189 S.}, year = {1996}, language = {en} } @article{SchulmeisterScheller1996, author = {Schulmeister, Thomas and Scheller, Frieder W.}, title = {The mathematics of exponential signal amplification in amperometric three enzyme electrodes}, year = {1996}, language = {en} } @article{SchulmeisterRoseVoigt1996, author = {Schulmeister, Thomas and Rose, J{\"u}rgen and Voigt, Horst}, title = {Some extensions of Schmidt's partition method for sequence comparison based on binary character amino acid properties}, year = {1996}, language = {en} } @article{PradhanChatterjeeSwarnaetal.1996, author = {Pradhan, D. K. and Chatterjee, M. and Swarna, M. and Kunz, Wolfgang}, title = {Implication-based gate-level synthesis for low-power}, isbn = {0-7803-3571-6}, year = {1996}, language = {en} } @book{KoutzevlovTschapek1996, author = {Koutzevlov, Atanas and Tschapek, Alexej}, title = {Software \& interface requirements specifications}, series = {HGG-Dokument}, volume = {UPHGG.014.1}, journal = {HGG-Dokument}, publisher = {Univ.}, address = {Potsdam}, year = {1996}, language = {en} } @book{KoutzevlovSchubertTschapek1996, author = {Koutzevlov, Atanas and Schubert, Wolfgang and Tschapek, Alexej}, title = {Software test plan \& test description}, series = {HGG-Dokument}, volume = {UPHGG.016.1}, journal = {HGG-Dokument}, publisher = {Univ.}, address = {Potsdam}, year = {1996}, language = {en} } @book{Richter1996, author = {Richter, Peter}, title = {Efficient deterministic approaches solving the general layout problem in graphs : Forschungsbericht}, publisher = {Univ.}, address = {Potsdam}, pages = {20 Bl.}, year = {1996}, language = {en} } @article{KunzReddySubodhetal.1996, author = {Kunz, Wolfgang and Reddy, S. M. and Subodh, M. and Pradhan, D. K.}, title = {Efficient logic verification in a synthesis environment}, year = {1996}, language = {en} } @article{Wildner1996, author = {Wildner, Uwe}, title = {Compiler assisted self-checking of structural integrity using return adress hashing}, year = {1996}, language = {en} } @article{StoffelKunz1996, author = {Stoffel, Dominik and Kunz, Wolfgang}, title = {Logic equivalence checking by optimization techniues}, year = {1996}, language = {en} } @article{SaposhnikovMorosovSaposhnikovetal.1996, author = {Saposhnikov, Va. V. and Morosov, Andrej and Saposhnikov, Vl. V. and G{\"o}ssel, Michael}, title = {Design of self-checking unidirectional combinational circuits with low area overhead}, year = {1996}, language = {en} } @article{GoesselSogomonyan1996, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A parity-preserving multi-input signature analyzer and it application for concurrent checking and BIST}, year = {1996}, language = {en} } @article{SaposhnikovDimitrievGoesseletal.1996, author = {Saposhnikov, Vl. V. and Dimitriev, Alexej and G{\"o}ssel, Michael and Saposhnikov, Va. V.}, title = {Self-dual parity checking - a new method for on-line testing}, year = {1996}, language = {en} } @article{KunduSogomonyanGoesseletal.1996, author = {Kundu, S. and Sogomonyan, Egor S. and G{\"o}ssel, Michael and Tarnick, Steffen}, title = {Self-checking comparator with one periodiv output}, year = {1996}, language = {en} } @article{GoesselSogomonyan1996, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A new self-testing parity checker for ultra-reliable applications}, year = {1996}, language = {en} } @article{MoschaninSaposhnikovSaposhnikovetal.1996, author = {Moschanin, Wladimir and Saposhnikov, Vl. V. and Saposhnikov, Va. V. and G{\"o}ssel, Michael}, title = {Synthesis of self-dual multi-output combinational circuits for on-line Teting}, year = {1996}, language = {en} } @article{SogomonyanGoessel1996, author = {Sogomonyan, Egor S. and G{\"o}ssel, Michael}, title = {Concurrently self-testing embedded checkers for ultra-reliable fault-tolerant systems}, year = {1996}, language = {en} } @phdthesis{Gerber1995, author = {Gerber, Stefan}, title = {Using software for fault detection in arithmetical circuits}, pages = {123 S.}, year = {1995}, language = {en} } @article{Gohlke1995, author = {Gohlke, Mario}, title = {A new approach for model-based recognition using colour regions}, year = {1995}, language = {en} } @article{Tarnick1995, author = {Tarnick, Steffen}, title = {Controllable self-checking checkers for conditional concurrent checking}, year = {1995}, language = {en} } @article{HellebrandRajskiTarnicketal.1995, author = {Hellebrand, Sybille and Rajski, Janusz and Tarnick, Steffen and Venkatraman, Srikanth and Courtois, Bernard}, title = {Built-in test for circuits with scan based on reseeding of multiole polynomial linear feedback shift registers}, year = {1995}, language = {en} } @article{HavemannGrivtsovMerkulenko1995, author = {Havemann, Ulrich and Grivtsov, A. G. and Merkulenko, N. N.}, title = {Molecular dynamics simulation of the association of model colloidal particles in two dimensions}, year = {1995}, language = {en} } @article{Richter1995, author = {Richter, Peter}, title = {A new deterministic approach for the optimization of cable layouts for power supply systems}, year = {1995}, language = {en} } @book{OPUS4-27228, title = {The journal of supercomputing : trends in parallel operating systems}, editor = {Schr{\"o}der-Preikschat, Wolfgang and Wu, Min-You}, publisher = {Kluwer}, address = {Boston}, pages = {157 S.}, year = {1995}, language = {en} } @article{SchroederPreikschat1995, author = {Schr{\"o}der-Preikschat, Wolfgang}, title = {Experience developing an object-oriented parallel operating system}, year = {1995}, language = {en} } @article{SchroederPreikschatGiloi1995, author = {Schr{\"o}der-Preikschat, Wolfgang and Giloi, Wolfgang K.}, title = {The next generation parallel architecture - multiple executing threads}, year = {1995}, language = {en} } @phdthesis{Tarnick1995, author = {Tarnick, Steffen}, title = {Data compression techniques for concurrent error detection and built-in self test}, pages = {159 S. : Ill.}, year = {1995}, language = {en} } @article{ReddyKunzPradhan1995, author = {Reddy, S. M. and Kunz, Wolfgang and Pradhan, D. K.}, title = {Novel verification framework combining structural and OBDD methods in a synthesis environment}, isbn = {0-8186-7213-7}, year = {1995}, language = {en} } @article{ChatterjeePradhanKunz1995, author = {Chatterjee, M. and Pradhan, D. K. and Kunz, Wolfgang}, title = {ATPG-based Transformations for random-pattern testable logic synthesis}, isbn = {0-8186-7213-7}, year = {1995}, language = {en} } @article{LinkeSchaub1995, author = {Linke, Thomas and Schaub, Torsten H.}, title = {Lemma handling in default logic theorem provers}, isbn = {3540601120}, year = {1995}, language = {en} } @article{BesnardSchaub1995, author = {Besnard, Philippe and Schaub, Torsten H.}, title = {An approach to context-based default reasoning}, issn = {0169-2968}, year = {1995}, language = {en} } @article{ThielscherSchaub1995, author = {Thielscher, Michael and Schaub, Torsten H.}, title = {Default reasoning by deductive planning}, year = {1995}, language = {en} } @article{SogomonyanGoessel1995, author = {Sogomonyan, Egor S. and G{\"o}ssel, Michael}, title = {A new parity preserving multi-input signature analyser}, year = {1995}, language = {en} } @article{BogueJuergensenGoessel1995, author = {Bogue, Ted and J{\"u}rgensen, Helmut and G{\"o}ssel, Michael}, title = {BIST with negligible aliasing through random cover circuits}, year = {1995}, language = {en} } @article{Richter1994, author = {Richter, Peter}, title = {Efficient shortest path algorithms for road traffic optimization}, year = {1994}, language = {en} } @book{SchroederPreikschat1994, author = {Schr{\"o}der-Preikschat, Wolfgang}, title = {The logical design of parallel operating systems}, publisher = {Prentice Hall International}, address = {Englewood Cliffs}, pages = {370 S.}, year = {1994}, language = {en} } @article{SchroederPreikschat1994, author = {Schr{\"o}der-Preikschat, Wolfgang}, title = {PEACE - software backplane for parallel computing}, year = {1994}, language = {en} } @article{Sommerfeld1994, author = {Sommerfeld, Erdmute}, title = {Operations on cognitive structures : their modelling on the basis of graph theory}, year = {1994}, language = {en} } @article{KunzPradhan1994, author = {Kunz, Wolfgang and Pradhan, D. K.}, title = {Recursive learning : a new implication technique for efficient solutions to CAD problems : test, verification and optimization}, year = {1994}, language = {en} } @article{Tarnick1994, author = {Tarnick, Steffen}, title = {Bounding error masking in linear output space compression schemes}, year = {1994}, language = {en} } @article{Tarnick1994, author = {Tarnick, Steffen}, title = {Controllable self-checking checkers for conditional concurrent checking}, year = {1994}, language = {en} } @article{Boehlau1994, author = {B{\"o}hlau, Peter}, title = {Zero aliasing compression based on groups of weakly independent outputs in circuits with high complexity for two fault models}, year = {1994}, language = {en} } @article{KunzMenon1994, author = {Kunz, Wolfgang and Menon, P.}, title = {Multi-level logic optimization by implication analysis}, isbn = {0-89791-690-5}, year = {1994}, language = {en} } @article{Cobernuss1994, author = {Cobernuss, M.}, title = {Bused interconnection network for parallel memory with linear storage}, isbn = {3-05-501602-5}, year = {1994}, language = {en} } @article{GoesselSogomonyan1994, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {Self-parity combinational-circuits for self-testing, concurrent fault-detection and parity scan design}, year = {1994}, language = {en} } @article{GoesselMorosovSaposhnikovetal.1994, author = {G{\"o}ssel, Michael and Morosov, Andrej and Saposhnikov, V. V. and Saposhnikov, VL. V.}, title = {Design of combinational self-testing devices with unidirectionally independent outputs}, year = {1994}, language = {en} } @article{BogueJuergensenGoessel1994, author = {Bogue, Ted and J{\"u}rgensen, Helmut and G{\"o}ssel, Michael}, title = {Design of cover circuits for monitoring the output of a MISR}, isbn = {0-8186-6307-3 , 0-8186-6306-5}, year = {1994}, language = {en} } @article{GoesselSogomonyan1994, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {Code disjoint self-parity combinational circuits for self-testing, concurrent fault detection and parity scan design}, year = {1994}, language = {en} } @article{GerberGoessel1994, author = {Gerber, Stefan and G{\"o}ssel, Michael}, title = {Detection of permanent faults of a floating point adder by pseudoduplication}, year = {1994}, language = {en} } @article{BesnardSchaub1993, author = {Besnard, Philippe and Schaub, Torsten H.}, title = {A context-based framework for default logics}, isbn = {0-262-51071-5}, year = {1993}, language = {en} } @article{KrstićWeidlingPetrovicetal., author = {Krstić, Miloš and Weidling, Stefan and Petrovic, Vladimir and Sogomonyan, Egor S.}, title = {Enhanced architectures for soft error detection and correction in combinational and sequential circuits}, series = {Microelectronics Reliability}, volume = {56}, journal = {Microelectronics Reliability}, issn = {0026-2714}, pages = {212 -- 220}, abstract = {In this paper two new methods for the design of fault-tolerant pipelined sequential and combinational circuits, called Error Detection and Partial Error Correction (EDPEC) and Full Error Detection and Correction (FEDC), are described. The proposed methods are based on an Error Detection Logic (EDC) in the combinational circuit part combined with fault tolerant memory elements implemented using fault tolerant master-slave flip-flops. If a transient error, due to a transient fault in the combinational circuit part is detected by the EDC, the error signal controls the latching stage of the flip-flops such that the previous correct state of the register stage is retained until the transient error disappears. The system can continue to work in its previous correct state and no additional recovery procedure (with typically reduced clock frequency) is necessary. The target applications are dataflow processing blocks, for which software-based recovery methods cannot be easily applied. The presented architectures address both single events as well as timing faults of arbitrarily long duration. An example of this architecture is developed and described, based on the carry look-ahead adder. The timing conditions are carefully investigated and simulated up to the layout level. The enhancement of the baseline architecture is demonstrated with respect to the achieved fault tolerance for the single event and timing faults. It is observed that the number of uncorrected single events is reduced by the EDPEC architecture by 2.36 times compared with previous solution. The FEDC architecture further reduces the number of uncorrected events to zero and outperforms the Triple Modular Redundancy (TMR) with respect to correction of timing faults. The power overhead of both new architectures is about 26-28\% lower than the TMR.}, language = {en} }