@article{SinghSogomonyanGoesseletal.1999,
  author    = {Singh, Adit D. and Sogomonyan, Egor S. and G{\"o}ssel, Michael and Seuring, Markus},
  title     = {Testability evaluation of sequential designs incorporating the multi-mode scannable memory element},
  year      = {1999},
  language  = {en}
}
@article{HilscherBraunRichteretal.2009,
  author    = {Hilscher, Martin and Braun, Michael and Richter, Michael and Leininger, Andreas and G{\"o}ssel, Michael},
  title     = {X-tolerant test data compaction with accelerated shift registers},
  issn      = {0923-8174},
  doi       = {10.1007/s10836-009-5107-5},
  year      = {2009},
  abstract  = {Using the timing flexibility of modern automatic test equipment (ATE) test response data can be compacted without the need for additional X-masking logic. In this article the test response is compacted by several multiple input shift registers without feedback (NF-MISR). The shift registers are running on a k-times higher clock frequency than the test clock. For each test clock cycle only one out of the k outputs of each shift register is evaluated by the ATE. The impact of consecutive X values within the scan chains is reduced by a periodic permutation of the NF-MISR inputs. As a result, no additional external control signals or test set dependent control logic is required. The benefits of the proposed method are shown by the example of an implementation on a Verigy ATE. Experiments on three industrial circuits demonstrate the effectiveness of the proposed approach in comparison to a commercial DFT solution.},
  language  = {en}
}
@article{BhattacharyaDimitrievGoessel2000,
  author    = {Bhattacharya, M. K. and Dimitriev, Alexej and G{\"o}ssel, Michael},
  title     = {Zero-aliasing space compresion using a single periodic output and its application to testing of embedded},
  year      = {2000},
  language  = {en}
}