@article{HilscherBraunRichteretal.2009, author = {Hilscher, Martin and Braun, Michael and Richter, Michael and Leininger, Andreas and G{\"o}ssel, Michael}, title = {X-tolerant test data compaction with accelerated shift registers}, issn = {0923-8174}, doi = {10.1007/s10836-009-5107-5}, year = {2009}, abstract = {Using the timing flexibility of modern automatic test equipment (ATE) test response data can be compacted without the need for additional X-masking logic. In this article the test response is compacted by several multiple input shift registers without feedback (NF-MISR). The shift registers are running on a k-times higher clock frequency than the test clock. For each test clock cycle only one out of the k outputs of each shift register is evaluated by the ATE. The impact of consecutive X values within the scan chains is reduced by a periodic permutation of the NF-MISR inputs. As a result, no additional external control signals or test set dependent control logic is required. The benefits of the proposed method are shown by the example of an implementation on a Verigy ATE. Experiments on three industrial circuits demonstrate the effectiveness of the proposed approach in comparison to a commercial DFT solution.}, language = {en} } @article{RabenaltRichterPoehletal.2012, author = {Rabenalt, Thomas and Richter, Michael and P{\"o}hl, Frank and G{\"o}ssel, Michael}, title = {Highly efficient test response compaction using a hierarchical x-masking technique}, series = {IEEE transactions on computer-aided design of integrated circuits and systems}, volume = {31}, journal = {IEEE transactions on computer-aided design of integrated circuits and systems}, number = {6}, publisher = {Inst. of Electr. and Electronics Engineers}, address = {Piscataway}, issn = {0278-0070}, doi = {10.1109/TCAD.2011.2181847}, pages = {950 -- 957}, year = {2012}, abstract = {This paper presents a highly effective compactor architecture for processing test responses with a high percentage of x-values. The key component is a hierarchical configurable masking register, which allows the compactor to dynamically adapt to and provide excellent performance over a wide range of x-densities. A major contribution of this paper is a technique that enables the efficient loading of the x-masking data into the masking logic in a parallel fashion using the scan chains. A method for eliminating the requirement for dedicated mask control signals using automated test equipment timing flexibility is also presented. The proposed compactor is especially suited to multisite testing. Experiments with industrial designs show that the proposed compactor enables compaction ratios exceeding 200x.}, language = {en} } @article{GerberGoessel1994, author = {Gerber, Stefan and G{\"o}ssel, Michael}, title = {Detection of permanent faults of a floating point adder by pseudoduplication}, year = {1994}, language = {en} } @book{SaposhnikovSaposhnikovMorozovetal.2004, author = {Saposhnikov, V. V. and Saposhnikov, Vl. V. and Morozov, Alexei and G{\"o}ssel, Michael}, title = {Necessary and Sufficient Conditions for the Existence of Self-Checking Circuits ba Use of Complementary Circuits}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {2004, 1}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ.}, address = {Potsdam}, issn = {0946-7580}, pages = {11 S.}, year = {2004}, language = {en} } @book{MarienfeldSogomonyanOcheretnijetal.2005, author = {Marienfeld, Daniel and Sogomonyan, Egor S. and Ocheretnij, V. and G{\"o}ssel, Michael}, title = {Self-checking Output-duplicated Booth-2 Multiplier}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {2005, 1}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ.}, address = {Potsdam}, issn = {0946-7580}, year = {2005}, language = {en} } @book{SogomonyanMarienfeldGoessel2006, author = {Sogomonyan, Egor S. and Marienfeld, Daniel and G{\"o}ssel, Michael}, title = {Fehlerkorrektur und Fehlererkennung}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {2006, 3}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ.}, address = {Potsdam}, issn = {0946-7580}, pages = {31, 8 S.}, year = {2006}, language = {de} } @book{BoernerGoessel2005, author = {B{\"o}rner, Ferdinand and G{\"o}ssel, Michael}, title = {Grundlagen digitaler Systeme}, publisher = {Univ.-Verl.}, address = {Potsdam}, isbn = {978-3-937786-46-9}, pages = {95 S.}, year = {2005}, language = {de} } @article{OcheretnijGoesselSogomonyanetal.2006, author = {Ocheretnij, Vitalij and G{\"o}ssel, Michael and Sogomonyan, Egor S. and Marienfeld, Daniel}, title = {Modulo p=3 checking for a carry select adder}, doi = {10.1007/s10836-006-6260-8}, year = {2006}, abstract = {In this paper a self-checking carry select adder is proposed. The duplicated adder blocks which are inherent to a carry select adder without error detection are checked modulo 3. Compared to a carry select adder without error detection the delay of the MSB of the sum of the proposed adder does not increase. Compared to a self-checking duplicated carry select adder the area is reduced by 20\%. No restrictions are imposed on the design of the adder blocks}, language = {en} } @article{SinghSogomonyanGoesseletal.1999, author = {Singh, Adit D. and Sogomonyan, Egor S. and G{\"o}ssel, Michael and Seuring, Markus}, title = {Testability evaluation of sequential designs incorporating the multi-mode scannable memory element}, year = {1999}, language = {en} } @article{DimitrievSaposhnikovSaposhnikovetal.1999, author = {Dimitriev, Alexej and Saposhnikov, V. V. and Saposhnikov, Vl. V. and G{\"o}ssel, Michael}, title = {Concurrent checking of sequential circuits by alternating inputs}, year = {1999}, language = {en} }