@book{GoesselOcheretnySogomonyanetal.2008, author = {Goessel, Michael and Ocheretny, Vitaly and Sogomonyan, Egor S. and Marienfeld, Daniel}, title = {New methods of concurrent checking}, series = {Frontiers in electronic testing}, volume = {42}, journal = {Frontiers in electronic testing}, publisher = {Springer}, address = {Dordrecht; Heidelberg}, isbn = {978-1-402-08419-5}, doi = {10.1007/978-1-4020-8420-1}, pages = {250 S.}, year = {2008}, language = {en} } @article{SeuringGoesselSogomonyan1998, author = {Seuring, Markus and G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A structural approach for space compaction for concurrent checking and BIST}, year = {1998}, language = {en} } @article{SogomonyanGoessel1995, author = {Sogomonyan, Egor S. and G{\"o}ssel, Michael}, title = {A new parity preserving multi-input signature analyser}, year = {1995}, language = {en} } @article{GoesselSogomonyan1996, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A parity-preserving multi-input signature analyzer and it application for concurrent checking and BIST}, year = {1996}, language = {en} } @article{HartjeGoesselSogomonyan1997, author = {Hartje, Hendrik and G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {Synthesis of code-disjoint combinational circuits}, year = {1997}, language = {en} } @article{SinghSogomonyanGoesseletal.1999, author = {Singh, Adit D. and Sogomonyan, Egor S. and G{\"o}ssel, Michael and Seuring, Markus}, title = {Testability evaluation of sequential designs incorporating the multi-mode scannable memory element}, year = {1999}, language = {en} } @article{GoesselSogomonyan1994, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {Self-parity combinational-circuits for self-testing, concurrent fault-detection and parity scan design}, year = {1994}, language = {en} } @article{GoesselSogomonyanMorosov1999, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S. and Morosov, Andrej}, title = {A new totally error propagating compactor for arbitrary cores with digital interfaces}, year = {1999}, language = {en} } @book{MarienfeldSogomonyanOcheretnijetal.2005, author = {Marienfeld, Daniel and Sogomonyan, Egor S. and Ocheretnij, V. and G{\"o}ssel, Michael}, title = {Self-checking Output-duplicated Booth-2 Multiplier}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {2005, 1}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ.}, address = {Potsdam}, issn = {0946-7580}, year = {2005}, language = {en} } @article{SogomonyanSinghGoessel1998, author = {Sogomonyan, Egor S. and Singh, Adit D. and G{\"o}ssel, Michael}, title = {A scan based concrrent BIST approach for low cost on-line testing}, year = {1998}, language = {en} } @book{SogomonyanMarienfeldGoessel2006, author = {Sogomonyan, Egor S. and Marienfeld, Daniel and G{\"o}ssel, Michael}, title = {Fehlerkorrektur und Fehlererkennung}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {2006, 3}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ.}, address = {Potsdam}, issn = {0946-7580}, pages = {31, 8 S.}, year = {2006}, language = {de} } @book{SogomonyanMarienfeldOcheretnijetal.2003, author = {Sogomonyan, Egor S. and Marienfeld, Daniel and Ocheretnij, V. and G{\"o}ssel, Michael}, title = {A new self-checking sum-bit duplicated carry-select adder}, series = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, volume = {2003, 5}, journal = {Preprint / Universit{\"a}t Potsdam, Institut f{\"u}r Informatik}, publisher = {Univ.}, address = {Potsdam}, issn = {0946-7580}, pages = {10 S.}, year = {2003}, language = {en} } @article{SogomonyanSinghGoessel1999, author = {Sogomonyan, Egor S. and Singh, Adit D. and G{\"o}ssel, Michael}, title = {A multi-mode scannable memory element for high test application efficiency and delay testing}, year = {1999}, language = {en} } @article{OcheretnijGoesselSogomonyanetal.2006, author = {Ocheretnij, Vitalij and G{\"o}ssel, Michael and Sogomonyan, Egor S. and Marienfeld, Daniel}, title = {Modulo p=3 checking for a carry select adder}, doi = {10.1007/s10836-006-6260-8}, year = {2006}, abstract = {In this paper a self-checking carry select adder is proposed. The duplicated adder blocks which are inherent to a carry select adder without error detection are checked modulo 3. Compared to a carry select adder without error detection the delay of the MSB of the sum of the proposed adder does not increase. Compared to a self-checking duplicated carry select adder the area is reduced by 20\%. No restrictions are imposed on the design of the adder blocks}, language = {en} } @article{GoesselSogomonyan1999, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {New totally self-checking ripple and carry look-ahead adders}, year = {1999}, language = {en} } @article{GoesselSogomonyan1994, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {Code disjoint self-parity combinational circuits for self-testing, concurrent fault detection and parity scan design}, year = {1994}, language = {en} } @article{KunduSogomonyanGoesseletal.1996, author = {Kundu, S. and Sogomonyan, Egor S. and G{\"o}ssel, Michael and Tarnick, Steffen}, title = {Self-checking comparator with one periodiv output}, year = {1996}, language = {en} } @article{HartjeSogomonyanGoessel1997, author = {Hartje, Hendrik and Sogomonyan, Egor S. and G{\"o}ssel, Michael}, title = {Code disjoint circuits for partity codes}, year = {1997}, language = {en} } @article{DugWeidlingSogomonyanetal.2020, author = {Dug, Mehmed and Weidling, Stefan and Sogomonyan, Egor and Jokic, Dejan and Krstić, Miloš}, title = {Full error detection and correction method applied on pipelined structure using two approaches}, series = {Journal of circuits, systems and computers}, volume = {29}, journal = {Journal of circuits, systems and computers}, number = {13}, publisher = {World Scientific}, address = {Singapore}, issn = {0218-1266}, doi = {10.1142/S0218126620502187}, pages = {15}, year = {2020}, abstract = {In this paper, two approaches are evaluated using the Full Error Detection and Correction (FEDC) method for a pipelined structure. The approaches are referred to as Full Duplication with Comparison (FDC) and Concurrent Checking with Parity Prediction (CCPP). Aforementioned approaches are focused on the borderline cases of FEDC method which implement Error Detection Circuit (EDC) in two manners for the purpose of protection of combinational logic to address the soft errors of unspecified duration. The FDC approach implements a full duplication of the combinational circuit, as the most complex and expensive implementation of the FEDC method, and the CCPP approach implements only the parity prediction bit, being the simplest and cheapest technique, for soft error detection. Both approaches are capable of detecting soft errors in the combinational logic, with single faults being injected into the design. On the one hand, the FDC approach managed to detect and correct all injected faults while the CCPP approach could not detect multiple faults created at the output of combinational circuit. On the other hand, the FDC approach leads to higher power consumption and area increase compared to the CCPP approach.}, language = {en} } @article{GoesselSogomonyan1996, author = {G{\"o}ssel, Michael and Sogomonyan, Egor S.}, title = {A new self-testing parity checker for ultra-reliable applications}, year = {1996}, language = {en} }