@misc{PlauthSterzEberhardtetal.2017,
  author    = {Plauth, Max and Sterz, Christoph and Eberhardt, Felix and Feinbube, Frank and Polze, Andreas},
  title     = {Assessing NUMA performance based on hardware event counters},
  series = {IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)},
  journal   = {IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)},
  publisher = {Institute of Electrical and Electronics Engineers},
  address   = {New York},
  isbn      = {978-0-7695-6149-3},
  issn      = {2164-7062},
  doi       = {10.1109/IPDPSW.2017.51},
  pages     = {904 -- 913},
  year      = {2017},
  abstract  = {Cost models play an important role for the efficient implementation of software systems. These models can be embedded in operating systems and execution environments to optimize execution at run time. Even though non-uniform memory access (NUMA) architectures are dominating today's server landscape, there is still a lack of parallel cost models that represent NUMA system sufficiently. Therefore, the existing NUMA models are analyzed, and a two-step performance assessment strategy is proposed that incorporates low-level hardware counters as performance indicators. To support the two-step strategy, multiple tools are developed, all accumulating and enriching specific hardware event counter information, to explore, measure, and visualize these low-overhead performance indicators. The tools are showcased and discussed alongside specific experiments in the realm of performance assessment.},
  language  = {en}
}