@article{WistWollowskiSchaeferetal.2009,
  author    = {Wist, Dominic and Wollowski, Ralf and Schaefer, Mark and Vogler, Walter},
  title     = {Avoiding irreducible CSC conflicts by internal communication},
  issn      = {0169-2968},
  doi       = {10.3233/Fi-2009-140},
  year      = {2009},
  abstract  = {Resynthesis of handshake specifications obtained e. g. from BALSA or TANGRAM with speed-independent logic synthesis from STGs is a promising approach. To deal with state-space explosion, we suggested STG decomposition; a problem is that decomposition can lead to irreducible CSC conflicts. Here, we present a new approach to solve such conflicts by introducing internal communication between the components. We give some first, very encouraging results for very large STGs concerning synthesis time and circuit area.},
  language  = {en}
}
@article{WistSchaeferVogleretal.2011,
  author    = {Wist, Dominic and Schaefer, Mark and Vogler, Walter and Wollowski, Ralf},
  title     = {Signal transition graph decomposition internal communication for speed independent circuit implementation},
  series = {IET Computers and digital techniques},
  volume    = {5},
  journal   = {IET Computers and digital techniques},
  number    = {6},
  publisher = {Institution of Engineering and Technology},
  address   = {Hertford},
  issn      = {1751-8601},
  doi       = {10.1049/iet-cdt.2010.0162},
  pages     = {440 -- 451},
  year      = {2011},
  abstract  = {Logic synthesis of speed independent circuits based on signal transition graph (STG) decomposition is a promising approach to tackle complexity problems like state-space explosion. Unfortunately, decomposition can result in components that in isolation have irreducible complete state coding conflicts. In earlier work, the authors showed how to resolve such conflicts by introducing internal communication between components, but only for very restricted specification structures. Here, they improve their former work by presenting algorithms for identifying delay transitions and inserting gyroscopes for specifications having a much more general structure. Thus, the authors are now able to synthesise controllers from real-life specifications. For all algorithms, they present correctness proofs and show their successful application to benchmarks, including very complex STGs arising in the context of control resynthesis.},
  language  = {en}
}
@book{WistWollowski2007,
  author    = {Wist, Dominic and Wollowski, Ralf},
  title     = {STG decomposition : avoiding irreducible CSC conflicts by internal communication},
  isbn      = {978-3-940793-02-7},
  url       = {http://nbn-resolving.de/urn:nbn:de:kobv:517-opus-32968},
  publisher      = {Universit{\"a}t Potsdam},
  year      = {2007},
  abstract  = {Inhalt: 1 Introduction 2 Basic Definitions 3 Achieving SI Implementability by Internal Communication 4 Towards a Structural Method 5 Examples 6 Conclusions and Future Work},
  language  = {en}
}
@book{WistSchaeferVogleretal.2010,
  author    = {Wist, Dominic and Schaefer, Mark and Vogler, Walter and Wollowski, Ralf},
  title     = {STG decomposition : internal communication for SI implementability},
  publisher = {Universit{\"a}tsverlag Potsdam},
  address   = {Potsdam},
  isbn      = {978-3-86956-037-3},
  url       = {http://nbn-resolving.de/urn:nbn:de:kobv:517-opus-40786},
  publisher      = {Universit{\"a}t Potsdam},
  pages     = {36},
  year      = {2010},
  abstract  = {STG decomposition is a promising approach to tackle the complexity problems arising in logic synthesis of speed independent circuits, a robust asynchronous (i.e. clockless) circuit type. Unfortunately, STG decomposition can result in components that in isolation have irreducible CSC conflicts. Generalising earlier work, it is shown how to resolve such conflicts by introducing internal communication between the components via structural techniques only.},
  language  = {en}
}
@article{KhomenkoSchaeferVogleretal.2009,
  author    = {Khomenko, Victor and Sch{\"a}fer, Mark and Vogler, Walter and Wollowski, Ralf},
  title     = {STG decomposition strategies in combination with unfolding},
  issn      = {0001-5903},
  doi       = {10.1007/s00236-009-0102-y},
  year      = {2009},
  abstract  = {For synthesising efficient asynchronous circuits one has to deal with the state space explosion problem. In order to alleviate this problem one can decompose the STG into smaller components. This paper deals with the decomposition method of Vogler and Wollowski and introduces several strategies for its efficient implementations. Furthermore, this approach is combined with another method to alleviate state space explosion, which is based on Petri net unfoldings. The developed algorithms are compared by means of benchmark examples, and the experimental results show significant improvement in terms of memory usage and runtime compared with other existing methods.},
  language  = {en}
}